TIDUE73A
April 2018 – November 2024
1
Description
Resources
Features
Applications
6
1
System Description
1.1
Key System Specifications
2
System Overview
2.1
Block Diagram
2.2
Highlighted Products
2.2.1
C2000 Real-Time MCU LaunchPad
2.2.2
SN65HVD78
2.2.3
TLV702
2.2.4
TPS22918-Q1
2.3
Design Considerations
2.3.1
BiSS-C Protocol
2.3.1.1
Line Delay Compensation
2.3.1.2
Processing Time Request by Encoder
2.3.1.3
Control Communication
2.3.2
C2000 BiSS-C Encoder Interface Overview
2.3.3
TIDM-1010 Board Implementation
2.3.4
MCU Resource Requirements
2.3.4.1
Input, Output Signals, and CLB Tiles
2.3.5
CLB BiSS-C Implementation Details
2.3.5.1
Transaction Waveforms
2.3.5.2
FRAME_STATE Generation
2.3.5.3
CLB_SPI_CLOCK Generation
2.3.5.4
ENCODER_CLOCK (MA) Generation
2.3.6
PM BiSS-C Interface Library
2.3.6.1
PM BiSS-C Library Functions
3
Hardware, Software, Testing Requirements, and Test Results
3.1
Hardware
3.1.1
TIDM-1010 Jumper Configuration
3.2
Software
3.2.1
C2000 Driver Library (DriverLib)
3.2.2
C2000 SysConfig
3.2.3
C2000 Configurable Logic Block Tool
3.2.4
Installing Code Composer Studio™ and C2000WARE-MOTORCONTROL-SDK
3.2.5
Locating the Reference Software
3.3
Testing and Results
3.3.1
Hardware Configuration
3.3.2
Building and Loading Project
3.3.3
Running Example Code
3.3.4
Encoder Test
3.3.5
Benchmarks
3.3.6
Troubleshooting
4
Design Files
5
Software Files
6
Related Documentation
Trademarks
7
Terminology
8
About the Authors
9
Revision History
Features
Flexible, Low-Voltage, BoosterPack Evaluation Platform for Position-Encoder Interfaces
Integrated MCU Solution for BiSS-C Without Additional FPGA Requirements
Easy Interface-to-BiSS-C Commands Through Driver Functions and Data Structure Provided by Library
Library Support for Unpacking Received Data and Optimized Cyclic Redundancy Check (CRC) Algorithm
Supports Clock Frequency up to 10 MHz and Verified Operation up to 100-m Cable Length
Includes Evaluation Software Example Showcasing BiSS-C Software Library