TIDUE73A April   2018  – November 2024

 

  1.   1
  2.   Description
  3.   Resources
  4.   Features
  5.   Applications
  6.   6
  7. 1System Description
    1. 1.1 Key System Specifications
  8. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Highlighted Products
      1. 2.2.1 C2000 Real-Time MCU LaunchPad
      2. 2.2.2 SN65HVD78
      3. 2.2.3 TLV702
      4. 2.2.4 TPS22918-Q1
    3. 2.3 Design Considerations
      1. 2.3.1 BiSS-C Protocol
        1. 2.3.1.1 Line Delay Compensation
        2. 2.3.1.2 Processing Time Request by Encoder
        3. 2.3.1.3 Control Communication
      2. 2.3.2 C2000 BiSS-C Encoder Interface Overview
      3. 2.3.3 TIDM-1010 Board Implementation
      4. 2.3.4 MCU Resource Requirements
        1. 2.3.4.1 Input, Output Signals, and CLB Tiles
      5. 2.3.5 CLB BiSS-C Implementation Details
        1. 2.3.5.1 Transaction Waveforms
        2. 2.3.5.2 FRAME_STATE Generation
        3. 2.3.5.3 CLB_SPI_CLOCK Generation
        4. 2.3.5.4 ENCODER_CLOCK (MA) Generation
      6. 2.3.6 PM BiSS-C Interface Library
        1. 2.3.6.1 PM BiSS-C Library Functions
  9. 3Hardware, Software, Testing Requirements, and Test Results
    1. 3.1 Hardware
      1. 3.1.1 TIDM-1010 Jumper Configuration
    2. 3.2 Software
      1. 3.2.1 C2000 Driver Library (DriverLib)
      2. 3.2.2 C2000 SysConfig
      3. 3.2.3 C2000 Configurable Logic Block Tool
      4. 3.2.4 Installing Code Composer Studio™ and C2000WARE-MOTORCONTROL-SDK
      5. 3.2.5 Locating the Reference Software
    3. 3.3 Testing and Results
      1. 3.3.1 Hardware Configuration
      2. 3.3.2 Building and Loading Project
      3. 3.3.3 Running Example Code
      4. 3.3.4 Encoder Test
      5. 3.3.5 Benchmarks
      6. 3.3.6 Troubleshooting
  10. 4Design Files
  11. 5Software Files
  12. 6Related Documentation
    1.     Trademarks
  13. 7Terminology
  14. 8About the Authors
  15. 9Revision History

Line Delay Compensation

In a real-world application environment, the encoder can be far from the controller. A long-cable connection between the encoder and the controller can delay transmission and physical noises.

Line delay is the propagation delay due to the length of the cable used in the transmission. When the controller starts sending the MA clock, some time is required for the clock to reach the encoder. When the encoder receives the clock, the encoder begins responding with SL data. The encoder's response also travels the reverse path to the controller through the cable. The time delay in the transmission of data over the wire is proportional to the length of the cable. With a cable length up to 100 meters, a cable delay of 1µs from the time the controller sends the clock until the controller receives the encoder's response is possible.

The BiSS-C interface has mechanism to compensate for line delay and avoid errors in the transmission of longer cables.

TIDM-1010 BiSS-C Line Delay Figure 2-3 BiSS-C Line Delay

Figure 2-3shows the signals in two perspectives: at the controller and at the encoder.

Refer to Figure 2-3 marker (1):

The MA at Controller line shows how the clock looks at the BiSS-C interface. This is on the cold side where the drive controller is located. The controller begins the transaction by sending the MA signal.

Refer to Figure 2-3 marker (2):

Due to the line delay, the MA clock signal is delayed at the encoder (motor). The MA at Encoder line shows the delay.

Refer to Figure 2-3 marker (3):

The encoder responds to the second rising edge of delayed MA clock. The SLO at Encoder line shows the response of the encoder to MA at Encoder.

Refer to Figure 2-3 marker (4):

The response takes some time to travel back to the controller. Traveling to the controller is delayed as shown in the SLO at Controller signal. By measuring the time duration between second rising edge of the MA clock and the first falling edge of the SLO line, the total time delayed can be calculated. To avoid the transmission errors, BiSS-C interface compensates for this line delay.