TIDUEM7A April   2019  – February 2021

 

  1.   Description
  2.   Resources
  3.   Features
  4.   Applications
  5.   5
  6. 1System Description
    1. 1.1 End Equipment
      1. 1.1.1 Electricity Meter
    2. 1.2 Key System Specifications
  7. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Highlighted Products
      1. 2.2.1 ADS131M04
      2. 2.2.2 TPS7A78
      3. 2.2.3 MSP432P4111
      4. 2.2.4 TPS3840
      5. 2.2.5 THVD1500
      6. 2.2.6 ISO7731B
      7. 2.2.7 TRS3232E
      8. 2.2.8 TPS709
      9. 2.2.9 ISO7720
    3. 2.3 Design Considerations
      1. 2.3.1 Design Hardware Implementation
        1. 2.3.1.1 TPS7A78 Cap-Drop Supply
        2. 2.3.1.2 TPS3840 SVS
        3. 2.3.1.3 Analog Inputs
          1. 2.3.1.3.1 Voltage Measurement Analog Front End
          2. 2.3.1.3.2 Current Measurement Analog Front End
      2. 2.3.2 Current-Detection Mode
        1. 2.3.2.1 ADS131M04 Current-Detection Procedure
        2. 2.3.2.2 Using an MCU to Trigger Current-Detection Mode
          1. 2.3.2.2.1 Using a Timer to Trigger Current-Detection Mode Regularly
          2. 2.3.2.2.2 MCU Procedure for Entering and Exiting Current-Detection Mode
        3. 2.3.2.3 How to Implement Software for Metrology Testing
          1. 2.3.2.3.1 Setup
            1. 2.3.2.3.1.1 Clock
            2. 2.3.2.3.1.2 Port Map
            3. 2.3.2.3.1.3 UART Setup for GUI Communication
            4. 2.3.2.3.1.4 Real-Time Clock (RTC)
            5. 2.3.2.3.1.5 LCD Controller
            6. 2.3.2.3.1.6 Direct Memory Access (DMA)
            7. 2.3.2.3.1.7 ADC Setup
          2. 2.3.2.3.2 Foreground Process
            1. 2.3.2.3.2.1 Formulas
          3. 2.3.2.3.3 Background Process
            1. 2.3.2.3.3.1 per_sample_dsp()
              1. 2.3.2.3.3.1.1 Voltage and Current Signals
              2. 2.3.2.3.3.1.2 Frequency Measurement and Cycle Tracking
            2. 2.3.2.3.3.2 LED Pulse Generation
            3. 2.3.2.3.3.3 Phase Compensation
    4. 2.4 Hardware, Software, Testing Requirements, and Test Results
      1. 2.4.1 Required Hardware and Software
        1. 2.4.1.1 Cautions and Warnings
        2. 2.4.1.2 Hardware
          1. 2.4.1.2.1 Connections to the Test Setup
          2. 2.4.1.2.2 Power Supply Options and Jumper Settings
        3. 2.4.1.3 Software
      2. 2.4.2 Testing and Results
        1. 2.4.2.1 Test Setup
          1. 2.4.2.1.1 SVS and Cap-Drop Functionality Testing
          2. 2.4.2.1.2 Electricity Meter Metrology Accuracy Testing
          3. 2.4.2.1.3 Current-Detection Mode Testing
          4. 2.4.2.1.4 Viewing Metrology Readings and Calibration
            1. 2.4.2.1.4.1 Viewing Results From LCD
            2. 2.4.2.1.4.2 Calibrating and Viewing Results From PC
              1. 2.4.2.1.4.2.1 Viewing Results
              2. 2.4.2.1.4.2.2 Calibration
                1. 2.4.2.1.4.2.2.1 Gain Calibration
                  1. 4.2.1.4.2.2.1.1 Voltage and Current Gain Calibration
                  2. 4.2.1.4.2.2.1.2 Active Power Gain Calibration
                2. 2.4.2.1.4.2.2.2 Offset Calibration
                3. 2.4.2.1.4.2.2.3 Phase Calibration
        2. 2.4.2.2 Test Results
          1. 2.4.2.2.1 SVS and TPS7A78 Functionality Testing Results
          2. 2.4.2.2.2 Electricity Meter Metrology Accuracy Results
          3. 2.4.2.2.3 Current-Detection Mode Results
  8. 3Design Files
    1. 3.1 Schematics
    2. 3.2 Bill of Materials
    3. 3.3 PCB Layout Recommendations
      1. 3.3.1 Layout Prints
    4. 3.4 Altium Project
    5. 3.5 Gerber Files
    6. 3.6 Assembly Drawings
  9. 4Related Documentation
    1. 4.1 Trademarks
  10. 5About the Author
  11. 6Revision History
2.4.1.2.1 Connections to the Test Setup

AC voltages and currents can be applied to the board for testing purposes at these points:

  • Terminal block "J22" is a two-position terminal block that corresponds to the line and neutral voltage connection. If referencing the shunt and system ground with respect to the neutral, connect the terminal block position on the left, which is labeled "NEG", to the neutral and connect the terminal block position on the right, which is labeled "POS", to the line. If referencing the shunt and system ground with respect to the line, connect the terminal block position on the left, which is labeled "NEG", to the line and connect the terminal block position on the right, which is labeled "POS", to the neutral. If the system is referenced with respect to the line, note that all voltage samples obtained from the ADS131M04 should be multiplied by –1 in the software to ensure that the phase shift between voltage and current is properly reflected for the power-related metrology readings.
  • Terminal block "J25" is connected to the output terminals of the shunt. This terminal block is a three-position terminal block with positions labeled "POS", "GND", and "NEG". For the gain of 32 used in this design, the differential voltage across the "POS" and "NEG" terminals of this terminal block should be less than ±37.5 mV. Do not connect a CT here since a burden resistor is not present for the circuitry of this channel like it is present for the J26 current circuitry. Figure 2-25 shows a mapping between shunt terminals and the positions on J25. The differential voltage output from the shunt, which is fed to the POS and NEG positions of J25, should not exceed ±37.5 mV.
  • Terminal block "J26" corresponds to the current inputs after the CT. This terminal block is a three-position terminal block but only the leftmost and rightmost positions are used. The center position, which is connected to GND, is not connected to the CT. Connect the positive terminal of the CT to the terminal block position (labeled "POS") on the most right. Connect the negative terminal of the CT to the terminal block position (labeled "NEG") on the most left. Select the applied current to the input of the CT so that it does not exceed 100 A. In addition, before performing any test, verify that this terminal block is securely connected to both output leads of the CT.

GUID-649C5080-8209-4455-875D-C926688FBFDF-low.pngFigure 2-25 Mapping Between Shunt Terminals and J25 Terminal Block Positions

Figure 2-26 shows the various test setup connections required for the reference design to function properly. If the shunt and system is referenced with respect to the neutral, V+ corresponds to the line connection and V- corresponds to the neutral connection. If the shunt and system is referenced with respect to the line, V+ corresponds to the neutral connection and V- corresponds to the line connection.

Ishunt+ and Ishunt- correspond to the current inputs to the shunt of the design while ICT+, and ICT- correspond to the current inputs to the current transformer of the design.

GUID-D0EA8815-AF8C-4457-87B5-DB37B1B36B5E-low.gifFigure 2-26 View of Reference Design With Test Setup Connections