Use the following procedures before running this design board. The design was constructed with 16S pack configurations, for other cell counts considerations, refer to Table 3-2 or Table 3-3 to modify the components. The board was tested using DC source and 4900-μF electrolytic capacitor in parallel to simulate the total pack. Sixteen 1-kΩ resisters in series are used to divide the pack voltage and simulate 16s battery cells.

Figure 3-1 shows the charge process setup example. DC source 1 configurations: 58 V – 3 A. DC source 2 configurations: 48 V – 0.5 A. Electronic load configurations: 48-V CV mode.

Figure 3-1 Charge Setup.

Figure 3-2 shows the discharge process setup example. DC source 1 configurations: 48 V - 20 A. Electronic load configurations: CC mode.

Figure 3-2 Discharge Setup.