TIDUEY6 April   2021

 

  1.   Description
  2.   Resources
  3.   Features
  4.   Applications
  5.   5
  6. 1System Description
  7. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Design Considerations
    3. 2.3 Highlighted Products
      1. 2.3.1 C2000 MCU F2838x
      2. 2.3.2 UCC5870-Q1 Gate Driver
  8. 3Hardware, Software, Testing Requirements, and Test Results
    1. 3.1 Hardware Requirements
      1. 3.1.1 Hardware Overview
        1. 3.1.1.1 Control Module
          1. 3.1.1.1.1 Control Mother Board
            1. 3.1.1.1.1.1 Inverter Safing - UCC5870 ASC and Fault Control
            2. 3.1.1.1.1.2 DC-DC Safing
            3. 3.1.1.1.1.3 DC-DC Converter Secondary PWM Selection
            4. 3.1.1.1.1.4 Blower Fan Control
            5. 3.1.1.1.1.5 Voltage Monitor
            6. 3.1.1.1.1.6 Resolver Interface Control
            7. 3.1.1.1.1.7 Test Points on Control Module
            8. 3.1.1.1.1.8 General Purpose Ports
            9. 3.1.1.1.1.9 Connectors and Headers on Control Mother Board
          2. 3.1.1.1.2 Power Supplies
            1. 3.1.1.1.2.1 Power Supply 5V /5A
            2. 3.1.1.1.2.2 Power Supply 12-V/1-A
            3. 3.1.1.1.2.3 Power Supply 15-V/0.5-A
          3. 3.1.1.1.3 TCAN4550 module
          4. 3.1.1.1.4 Dual TCAN Module
          5. 3.1.1.1.5 Analog Back End Module
          6. 3.1.1.1.6 Resolver Analog Front End Module
        2. 3.1.1.2 Inverter Module
          1. 3.1.1.2.1 Inverter Mother Board
            1. 3.1.1.2.1.1 Connectors and Headers on Inverter Mother Board
            2. 3.1.1.2.1.2 Jumper and Test Points on Inverter Module
          2. 3.1.1.2.2 Inverter Gate Driver Module
            1. 3.1.1.2.2.1 Inverter Gate Drive Power Supply Module
          3. 3.1.1.2.3 Inverter Current Sense Module
          4. 3.1.1.2.4 Inverter Voltage Sense Module
        3. 3.1.1.3 DC-DC Bidirectional Converter Module
          1. 3.1.1.3.1 DC-DC Converter Mother Board
          2. 3.1.1.3.2 DC-DC Gate Driver Module
    2. 3.2 Resource Mapping
    3. 3.3 Test Setup
    4. 3.4 Test Results
  9. 4General Texas Instruments High Voltage Evaluation (TI HV EVM) User Safety Guidelines
  10. 5Design and Documentation Support
    1. 5.1 Design Files
      1. 5.1.1 Schematics
      2. 5.1.2 BOM
    2. 5.2 Software
    3. 5.3 Documentation Support
    4. 5.4 Support Resources
    5. 5.5 Trademarks
  11. 6About the Author

Design Considerations

The traction drive subsystem is designed to drive an AC induction motor or some combination of interior permanent magnet synchronous motor (IPMSM) and synchronous reluctance motor (SynRM). High bandwidth field oriented control (FOC) scheme with dynamic decoupling is implemented with C2000 real-time control MCU together with field-weakening and over-modulation techniques to driver motor to industry-leading high speed up to 20,000 RPM, which can enable cost and weight reduction to the traction motor.

Traction drive system normally uses a variable reluctance (VR) resolver, which matches the pole count of the motor, to directly measure the electric angle of the rotor. Resolver to digital conversion (RDC) is required to measure position and speed using resolver signal. RDC is traditionally handled by a separate IC, such as PGA411-Q1. With C2000 MCU, RDC for high-speed traction inverter can be integrated into main control MCU, where the excitation generation can be handled with DMA without CPU involvement, and feedback is read through ADC and decoded with CPU.

A PSFB topology allows the switching devices to switch with zero voltage switching (ZVS) resulting in lower switching losses and higher efficiency. PCMC is a highly desired control scheme for power converters because of its inherent voltage feed forward, automatic cycle-by-cycle current limiting, flux balancing, and other advantages, which requires generating complex PWM drive waveforms along with fast and efficient control loop calculations. This is made possible on C2000 microcontrollers by advanced on-chip control peripherals like PWM modules, analog comparators with DAC and slope compensation hardware and 12-bit high-speed ADCs coupled with an efficient 32-bit CPU.