TIDUEZ1 March 2021
The TPL7407LA device is a 30-V, high-current NMOS transistor array. This device consists of seven NMOS transistors with common-cathode clamp diodes for switching inductive loads. The maximum drain-current rating of a single NMOS channel is 600 mA. New regulation and drive circuitry is added to give maximum drive strength across all GPIO ranges (1.8 V–5 V). The key benefit of the TPL7407LA is its improved power efficiency and lower leakage than a bipolar Darlington implementation.
The design needs a low-side switch at the output of the digital isolator to interface to the PNP transistor of the gate-drive circuit. The gate-drive power supply is around 10 V; therefore, the TPL7407LA provides adequate design margins and a compact size with good integration.