TIDUEZ6
December 2021
TPS62912
,
TPS62913
Description
Resources
Features
Applications
5
1
System Overview
1.1
Key System Level Specifications
1.2
System Description
1.3
Block Diagram
1.4
Design Considerations
1.4.1
Frequency Band and Applications
1.4.1.1
RF Transceiver Synchronization Challenges
1.4.1.2
JESD204B-Compliant Multichannel Phase Synchronized Clocks Generation
1.4.2
Clock Jitter and System SNR
1.4.3
Power-Supply Selection
1.4.4
Highlighted Products
1.4.4.1
AFE7950
1.4.4.2
LMX2820
1.4.4.3
LMK04832
1.4.4.4
TPS62913 and TPS62912
1.4.4.5
LMK1C1104
2
Hardware, Software, Testing Requirements, and Test Results
2.1
Required Hardware and Software
2.1.1
Hardware
2.1.1.1
Clocking Board Setup
2.1.1.2
FMC-to-FMC Adapter Board Setup
2.1.1.3
AFE7950EVM Setup
2.1.1.4
TSW14J56EVM Setup
2.1.1.5
Hardware Setup of Multiple Transceiver Synchronization
2.1.2
Software
2.1.2.1
TIDA-010230 Clocking Board GUI
2.1.2.2
AFE7950 EVM GUI
2.1.2.3
High-Speed Data Converter (HSDC) Pro
2.1.2.4
Programming Steps
2.1.2.5
Clocking Board Programming Sequence
2.1.2.6
Latte SW and HSDC Pro Setup
2.2
Test Setup
2.3
Test Results
2.3.1
LMX2820 Phase-Noise Performance
2.3.2
AFE7950 Transmitter Performance
2.3.3
AFE7950 Receiver Performance
2.3.4
Multiple AFE7950s TX and RX Alignment
2.3.5
Summary and Conclusion
3
Design and Documentation Support
3.1
Design Files
3.1.1
Schematics
3.1.2
BOM
3.2
Tools and Software
3.3
Documentation Support
3.4
Support Resources
3.5
Trademarks
4
About the Author
5
Acknowledgement
3.1
Design Files