TIDUF08 January   2024

 

  1.   1
  2.   Description
  3.   Resources
  4.   Features
  5.   Applications
  6.   6
  7. 1System Description
  8. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Design Considerations
    3. 2.3 General Layout Recommendations
      1. 2.3.1 DLPC3436 Layout Guidelines
        1. 2.3.1.1 PLL Power Layout
        2. 2.3.1.2 I2C Interface Performance
        3. 2.3.1.3 DMD Control and Sub-LVDS Signals
        4. 2.3.1.4 Layout Layer Changes
        5. 2.3.1.5 Stubs
        6. 2.3.1.6 Terminations
        7. 2.3.1.7 Routing Vias
      2. 2.3.2 FPGA DDR2 SDRAM Interface Routing
      3. 2.3.3 DLPA2005 Layout Recommendations
        1. 2.3.3.1 Layout Guidelines
        2. 2.3.3.2 Layout Example
        3. 2.3.3.3 Thermal Considerations
      4. 2.3.4 DMD Flex Cable Interface Layout Guidelines
    4. 2.4 Highlighted Products
  9. 3Hardware
    1. 3.1 Hardware Requirements
  10. 4Design and Documentation Support
    1. 4.1 Design Files
      1. 4.1.1 Schematics
      2. 4.1.2 BOM
      3. 4.1.3 Layout Files
      4. 4.1.4 Mechanical Files
    2. 4.2 Software and FPGA code
    3. 4.3 Documentation Support
    4. 4.4 Support Resources
    5. 4.5 Trademarks

3.1 Hardware Requirements

  1. Power up the DLPC1438 Reference Design by applying an external DC power supply (14–20 V DC) to the JPWR1 connector.

    External Power Supply Requirements:

    • Nominal Output Voltage: 14–20 V DC
    • Minimum Output Current: 3 A; Maximum Output Current: 4 A
    • Efficiency Level: VI
      Note: TI recommends using an external power supply that complies with applicable regional safety standards such as UL, CSA, VDE, CCC, PSE, and so forth.

  2. SW1 enables power into the system. When engaged LED D12 (green) turns on. SW2 drives PROJ_ON and when engaged turns on LED D17 (green). With SW1 and SW2 in the on positions the system boots (The DLP300S or DLP301S DMD must be connected for system boot to complete.).

There are several indicator LEDs on the DLPC1438 Reference Design, and the LEDs are defined in Table 3-1.

Table 3-1 LEDs on the DLPC1438 Reference Design
LED REFERENCE SIGNAL INDICATION DECSCRIPTION
D5 HOST_IRQ ON during DLPC1438 boot, OFF when projector is running. Indication of DLPC1438 boot-up completed and ready to receive commands
D17 PROJ_ON PROJ_ON signal is HIGH
D4 INIT_DONE ON when FPGA initialization is completed. OFF indicates that the FPGA is in RESET or a configuration error occurred.
D3 CONF_DONE ON when FPGA configuration is completed.
D9 P5V Input voltage 5 V applied