TIDUF08 January   2024

 

  1.   1
  2.   Description
  3.   Resources
  4.   Features
  5.   Applications
  6.   6
  7. 1System Description
  8. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Design Considerations
    3. 2.3 General Layout Recommendations
      1. 2.3.1 DLPC3436 Layout Guidelines
        1. 2.3.1.1 PLL Power Layout
        2. 2.3.1.2 I2C Interface Performance
        3. 2.3.1.3 DMD Control and Sub-LVDS Signals
        4. 2.3.1.4 Layout Layer Changes
        5. 2.3.1.5 Stubs
        6. 2.3.1.6 Terminations
        7. 2.3.1.7 Routing Vias
      2. 2.3.2 FPGA DDR2 SDRAM Interface Routing
      3. 2.3.3 DLPA2005 Layout Recommendations
        1. 2.3.3.1 Layout Guidelines
        2. 2.3.3.2 Layout Example
        3. 2.3.3.3 Thermal Considerations
      4. 2.3.4 DMD Flex Cable Interface Layout Guidelines
    4. 2.4 Highlighted Products
  9. 3Hardware
    1. 3.1 Hardware Requirements
  10. 4Design and Documentation Support
    1. 4.1 Design Files
      1. 4.1.1 Schematics
      2. 4.1.2 BOM
      3. 4.1.3 Layout Files
      4. 4.1.4 Mechanical Files
    2. 4.2 Software and FPGA code
    3. 4.3 Documentation Support
    4. 4.4 Support Resources
    5. 4.5 Trademarks

2.3.3.3 Thermal Considerations

An important consequence of the efficiency numbers shown in Figure 2-5 is that it enables to perform DLPA2005 thermal calculations. Since the efficiency is not 100%, power is dissipated in the DLPA2005 chip. Due to that dissipation, die temperature rises. For reliability reasons, is good to aim for as low as possible die temperatures. Using a heat sink and airflow are efficient means to keep die temperature reasonably low. In cases that airflow and or a heat sink are or is not feasible, the system designer must specifically pay attention to the thermal design. The die temperature for regular operation needs to remain below 120°C.

GUID-CF302D3B-6C44-4AC8-B985-7A7D05ACE5BF-low.gifFigure 2-5 Measured Typical Power Converter Efficiency as a Function of ILED for Several Supply Voltages (VOUTmax = 4.8 V for Each Supply)

In the following, an example is given of such a thermal calculation. The calculation starts with summarizing all blocks in the DLPA2005 that dissipate. The buck-boost converter supplying the LED power is the main source of dissipation. For illustrating purposes, we assume this buck-boost converter to be the only block that dissipates significantly. For the example assume: VOUT = 4.8 V (for all three LEDs), IOUT = 2.4 A and VIN = 5 V. From Figure 2-5 it can be derived that the related efficiency equals about neff = 88%.

The power dissipated by the DLPA2005 is then given by:

Equation 1. GUID-C6BBA224-E02F-48EA-8F0B-26016760BC2C-low.gif

The rise of die temperature due to this power dissipation can be calculated using the thermal resistance from junction to ambient, JA=27.9°C/W. This calculation yields:

Equation 2. GUID-2B5BB49B-DC95-4690-99D1-225779C992FC-low.gif

It is also possible to calculate the maximum allowable ambient temperature to prevent surpassing the maximum die temperature. Assume again the dissipation of PDISS=1.6W. The maximum ambient temperature that is allowed is then given by:

Equation 3. GUID-F4E65CB0-AA23-409C-B979-519F4A9020CF-low.gif

It is again stressed that for proper calculations, the total power dissipation of the DLPA2005 needs to be taken into account. Also, if components that are close to the DLPA2005 also dissipate a significant amount of power, the (local) ambient temperature can be higher than the ambient temperature of the system.

If calculations show that the die temperature can surpass the maximum specified value, two basic options exist:

  • Adding a heat sink with or without airflow. This reduces 0JA yielding lower die temperature.
  • Lowering the dissipation in the DLPA2005 implying lowering the maximum allowable LED current.