TIDUF09 December   2022

 

  1.   Description
  2.   Resources
  3.   Features
  4.   Applications
  5.   5
  6. 1System Description
    1. 1.1 Key System Specifications
  7. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Design Considerations
    3. 2.3 Theory of Operation
    4. 2.4 Highlighted Products
      1. 2.4.1 TPS7A57 Low Dropout (LDO) Regulator
      2. 2.4.2 LMG1020 Low Side Driver
  8. 3Hardware, Software, Testing Requirements, and Test Results
    1. 3.1 Hardware Requirements
    2. 3.2 Test Setup
      1. 3.2.1 Optional Load Transient Circuit Operation
    3. 3.3 Test Results
      1. 3.3.1 Current Sharing
      2. 3.3.2 VLOAD vs ILOAD
      3. 3.3.3 Load Transient Response
      4. 3.3.4 Current Limit
      5. 3.3.5 Startup
      6. 3.3.6 Noise
      7. 3.3.7 PSRR
      8. 3.3.8 Thermal
      9. 3.3.9 Thermal Limit Protection
  9. 4Design and Documentation Support
    1. 4.1 Design Files
      1. 4.1.1 Schematics
      2. 4.1.2 BOM
    2. 4.2 Tools
    3. 4.3 Documentation Support
    4. 4.4 Support Resources
    5. 4.5 Trademarks
  10. 5About the Author

2.3 Theory of Operation

This topology uses ballast resistors. Ballast resistors provide an easy way to connect multiple voltage sources together to supply power to a common load. It is critical to minimize the voltage difference at the output of each individual LDO. As LDO accuracy improves, the designer can reduce the size of the ballast resistor.

Each LDO has its own internal reference, which is slightly different than the other independent references. To achieve the smallest current sharing error between the different LDO's, this solution connects the current source reference's together through the REF pins. The remaining sources of error come from the ballast resistors, the internal output field-effect transistor (FET), and the amplifier. These errors show up as the offset voltage (VNR-VOUT) which itself is also a function of line and load. These sources of error make up the total error VE of each LDO. In this reference design the ballast resistors are configured to be the same value for simplicity.

Traditionally the ballast resistance was chosen using Equation 1 to set the current imbalance IMAX of the parallel LDO's. This formula does not account for the required load voltage, VLOAD, which is also a requirement for most modern power supplies designed with parallel LDO's. Texas Instruments has modernized the design and analysis of parallel LDO's using ballast resistors (see references [4] and [6]) and a down-loadable software tool has been developed to design RB for our LDO's and a set of system requirements (see reference [5]).

After RB has been selected, by using Equation 1, Equation 2 can be used to assess the current out of each LDO. Equation 3 can be used to assess the VLOAD of the system. For additional details on these equations, see reference [4]. Reference [5] can be used to quickly perform the calculations needed to select RB for a specified load current and load voltage.

Equation 1. R B   = max 1 < x < n ⁡ V E n - min 1 < x < n ⁡ V E n ∆ I M A X
Equation 2. I O U T n = I L O A D - ∑ n = 1 n V E n R B n + V E n R B
Equation 3. V L O A D = ∑ n = 1 n V O U T n + V E n R B n   -   I L O A D ∑ n = 1 n 1 R B n

Where:

  • VOUTn is the nominal LDO output voltage
  • VEn is the error of each LDO
  • Δ IMAX is the maximum current sharing imbalance between the parallel LDO's
  • IOUTn is the LDO output current
  • RB is the ballast resistance
  • n is the number of parallel LDO's

In addition to IOUTn and VLOAD, other system requirements can require using a parallel LDO topology such as noise, PSRR, dropout and thermal limitations. In brief, parallel LDO's:

  1. Reduce the system noise by the square root of the number of LDO's in parallel
  2. Increase the system PSRR when compared with using a single LDO
  3. Reduce the dropout requirement by spreading the load current across multiple LDO's
  4. Decrease the junction temperature of the linear regulator by spreading the power dissipation across multiple LDO's

For a detailed discussion on all of these system requirements, how parallel LDO's can increase your performance, and how many parallel LDO's are needed for your system requirements, please see the references [4], [5], and [6].

Ballast resistors are typically employed as either a PCB trace or a discrete resistor. In general, PCB trace resistors favor applications which are low cost. PCB trace resistors also favor applications which operate in a narrow temperature range or experience very high temperatures. They are excellent choices where multiple low current devices are paralleled together (such as would be seen in high voltage LDO's which are usually limited in their available output currents). Discrete resistors favor applications which require maximum performance (where output voltage tolerance and transient responses are critical). Discrete resistors also favor applications where high current devices are being paralleled (such as low voltage LDO's where high current devices are readily available). Designing with a discrete ballast resistor becomes challenging when ambient temperatures exceed 125°C, and it is difficult to use discrete ballast resistors above 150°C. For a detailed discussion on ballast resistor analysis and design, see reference [4]

Table 2-1 PCB Trace Resistor vs. Discrete Resistor Summary
Ballast Resistor Option Cost Tolerance Parasitic Inductance High Temperature Operation
PCB Trace Resistor Free after the PCB trace resistor design is complete. Large: Resistor value nearly doubles across the operating temperature range. Increases with PCB trace length Only limited by the Tg of the FR4
Discrete Resistor Must be sourced, purchased and installed on each PCB. Low: discrete resistors come in 100 ppm or lower tolerances Low Large package sizes (0805 or 1206) can be required at higher temperatures.