TIDUF23 may   2023

 

  1.   Description
  2.   Resources
  3.   Features
  4.   Applications
  5.   5
  6. 1System Description
    1. 1.1 Key System Specifications
  7. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Design Considerations
    3. 2.3 Highlighted Products
      1. 2.3.1  UCC5880-Q1
      2. 2.3.2  AM2634-Q1
      3. 2.3.3  TMS320F280039C-Q1
      4. 2.3.4  UCC14240-Q1
      5. 2.3.5  UCC12051-Q1
      6. 2.3.6  AMC3330-Q1
      7. 2.3.7  TCAN1462-Q1
      8. 2.3.8  ISO1042-Q1
      9. 2.3.9  ALM2403-Q1
      10. 2.3.10 LM5158-Q1
      11. 2.3.11 LM74202-Q1
    4. 2.4 System Design Theory
      1. 2.4.1 Microcontrollers
        1. 2.4.1.1 Microcontroller – C2000™
        2. 2.4.1.2 Microcontroller – Sitara™
      2. 2.4.2 Isolated Bias Supply
      3. 2.4.3 Power Tree
        1. 2.4.3.1 Introduction
        2. 2.4.3.2 Power Tree Block Diagram
        3. 2.4.3.3 12 V Distribution and Control
        4. 2.4.3.4 Gate Drive Supply
        5. 2.4.3.5 5-Volt Supply Domain
        6. 2.4.3.6 Current and Position Sensing Power
  8. 3Hardware, Software, Testing Requirements, and Test Results
    1. 3.1 Hardware Requirements
      1. 3.1.1 Hardware Board Overview
        1. 3.1.1.1 Control Board
        2. 3.1.1.2 MCU Control Card – Sitara™
        3. 3.1.1.3 MCU Control Card – C2000™
        4. 3.1.1.4 Gate Driver and Bias Supply Board
        5. 3.1.1.5 DC Bus Voltage Sense
        6. 3.1.1.6 SiC Power Module
          1. 3.1.1.6.1 XM3 SiC Power Module
          2. 3.1.1.6.2 Module Power Terminals
          3. 3.1.1.6.3 Module Signal Terminals
          4. 3.1.1.6.4 Integrated NTC Temperature Sensor
        7. 3.1.1.7 Laminated Busing and DC Bus Capacitors
          1. 3.1.1.7.1 Discharge PCB
    2. 3.2 Test Setup
      1. 3.2.1 Software Setup
        1. 3.2.1.1 Code Composer Studio Project
        2. 3.2.1.2 Software Structure
    3. 3.3 Test Procedure
      1. 3.3.1 Project Setup
      2. 3.3.2 Running the Application
    4. 3.4 Test Results
      1. 3.4.1 Isolated Bias Supply
      2. 3.4.2 Isolated Gate Driver
      3. 3.4.3 Inverter System
  9. 4General Texas Instruments High Voltage Evaluation (TI HV EVM) User Safety Guidelines
  10. 5Design and Documentation Support
    1. 5.1 Design Files
      1. 5.1.1 Schematics
      2. 5.1.2 BOM
      3. 5.1.3 PCB Layout Recommendations
        1. 5.1.3.1 Layout Prints
      4. 5.1.4 Altium Project
      5. 5.1.5 Gerber Files
      6. 5.1.6 Assembly Drawings
    2. 5.2 Tools and Software
    3. 5.3 Documentation Support
    4. 5.4 Support Resources
    5. 5.5 Trademarks
  11. 6Terminology

2.2 Design Considerations

The primary goal of a traction system is to efficiently drive the traction motor, typically an induction or an interior permanent magnet synchronous motor (IPMSM), with a high control bandwidth. For this, TIDM-02014 features the C2000 real-time control MCU to implementing a field oriented control (FOC) scheme to drive the motor. The design also supports TI's Sitara™ AM263x MCU based control implementation to achieve high real-time performance while supporting functional-safety requirements.

To achieve high-efficiency operation of the SiC inverter, the UCC5880-Q1 functional-safety compliant isolated gate driver design is leveraged. In addition to advanced configuration and protection features, the real-time variable gate driver strength feature of the UCC5880-Q1 enables efficiency optimization. The gate drive bias supply design features the UCC14240-Q1 bias supply device with integrated isolation transformer and post regulation. The tight regulation capability of the UCC14240-Q1 minimizes the device conduction loss during operation. With these designs the gate-drive BOM and PCB footprint can be reduced by up to 30%.

The design philosophy for the power stage aims to maximize performance through high-ampacity, low-inductance design while minimizing the cost and complexity. To achieve this, five key parameters are considered. First, due to the high current density and relatively small size of the SiC modules, a high-performance thermal stackup is implemented to maximize heat transfer. Second, the stray inductance introduced by the busbar structure is minimized through the use of low-inductance, overlapping planar structures. Third, low-inductance and high ripple rating capacitors must are utilized to close the high-frequency switching loop effectively. Fourth, the gate driver high-speed protections and high-noise immunity features are leveraged for effective switching of the SiC moduels and providing maximum survivability under fault conditions. Lastly, the power stage's engineering is aimed to minimize complexity for assembly, manufacturing and the system cost. The inverter measures 279 mm by 291 mm by 115 mm for a total volume of 9.3 L and a power density of up to 32.25 kW/L which is more than 2x comparable Silicon (Si) based inverters.