TIDUF26 june   2023 BQ24072 , LMR36520 , TLV62568 , TPS2116

 

  1.   1
  2.   Description
  3.   Resources
  4.   Features
  5.   Applications
  6.   6
  7. 1System Description
    1. 1.1 Key System Specifications
  8. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Design Considerations
      1. 2.2.1 24 VAC to DC Rectification
      2. 2.2.2 eFuse Protection
      3. 2.2.3 5-V Rails
        1. 2.2.3.1 LMR36520 Voltage Rail
        2. 2.2.3.2 USB Power Input
      4. 2.2.4 Power Source ORing
      5. 2.2.5 Battery Management
      6. 2.2.6 3.3-V Power Rail
      7. 2.2.7 Power Rail Current Sensing
      8. 2.2.8 Backlight LED Driver
      9. 2.2.9 BoosterPack Overview
    3. 2.3 Highlighted Products
      1. 2.3.1 LMR36520
      2. 2.3.2 TPS2116
      3. 2.3.3 TLV62568
      4. 2.3.4 INA2180
      5. 2.3.5 TPS92360
      6. 2.3.6 TPS2640
      7. 2.3.7 BQ24072
  9. 3Hardware, Software, Testing Requirements, and Test Results
    1. 3.1 Hardware Requirements
    2. 3.2 Test Setup
    3. 3.3 Test Results
      1. 3.3.1  24-VAC Start-Up and Shutdown
      2. 3.3.2  USB Start-Up and Shutdown
      3. 3.3.3  ORing
      4. 3.3.4  LMR36520
      5. 3.3.5  TLV62568 Transient Response
      6. 3.3.6  BM24072 Transient Response
      7. 3.3.7  TLV62568 (3V3 Power Rail)
      8. 3.3.8  LMR36520 (LMOut Power Rail)
      9. 3.3.9  BM24072 (BMOut Power Rail)
      10. 3.3.10 Reference
        1. 3.3.10.1 TLV62568
        2. 3.3.10.2 LMR36520
  10. 4Design and Documentation Support
    1. 4.1 Design Files
      1. 4.1.1 Schematics
      2. 4.1.2 BOM
    2. 4.2 Tools and Software
    3. 4.3 Documentation Support
    4. 4.4 Support Resources
    5. 4.5 Trademarks
  11. 5About the Author

3.3.2 USB Start-Up and Shutdown

Figure 3-12 shows a 5.1-V USB cable being plugged into the system (A 3-ft USB A to USB micro-B cable was used for Figure 3-12 and Figure 3-13). The node USBin exhibits no overshoot, which is due, in part, to the snubber circuit detailed in Section 2.2.3.2. The PWRIn, which is the output of the ORing circuit, matches the response of the USBin. This test shows 4 ms passes before the battery management system regulates the output, BMOut, to 200 mV plus VBATT. As with the 24-VAC start-up, the battery was previously supplying the load when the USB was plugged in. Upon USB plug in, the battery management begins charging the battery with up to 300 mA. The 3V3 rail shows no significant transient response to the change in power sources. Figure 3-13 shows power transition back to the battery as the USB is unplugged. Approximately 20 ms passes before the USBIn rail diminishes towards zero. A slight drop at BMOut is seen as the system switches to battery power and thus VBATT. The 3V3 rail remains very steady with no significant transient response during the transition.

GUID-20230607-SS0I-CN48-GBT2-SS1BZPDCSVT6-low.png Figure 3-12 USB 5.1-V Start-Up
GUID-20230607-SS0I-ZKVM-5W0P-30ZTGJJFKFQL-low.png Figure 3-13 USB 5.1-V Shutdown

Figure 3-14 shows a start-up variation with USBin at 4.35 V, the minimum allowed per USB 2.0 specifications. The actual tests for Figure 3-14 and Figure 3-15 were performed with banana to grabber cables. These cables are not isolated and exhibit significantly more parasitic inductance than a typical USB cable. Even so, a very minimal overshoot of 150 mV is observed. The high-level voltage of the USB rail is reached approximately 2 µs after initial plug in. As observed in Figure 3-14, the delay time for the ORing circuit to pass the USBin to the PWRIn rail is approximately 100 µs. Figure 3-16 and Figure 3-17 show similar results.

GUID-20230607-SS0I-N5GZ-GRKT-RMLRGCW94BW4-low.png Figure 3-14 USB 4.35-V Start-Up
GUID-20230607-SS0I-7MK8-QM8N-SP2Z1LLZ0CLX-low.png Figure 3-15 USB 4.35-V Shutdown
GUID-20230607-SS0I-XFNK-5JC0-SGMHZ5Z7R0JN-low.png Figure 3-16 USB 5.25-V Start-Up
GUID-20230607-SS0I-WDH5-SJRW-F5MP9VLNJR22-low.png Figure 3-17 5.25-V Shutdown