TIDUF28 November   2023

 

  1.   1
  2.   Description
  3.   Resources
  4.   Features
  5.   Applications
  6.   6
  7. 1System Description
    1. 1.1 Key System Specifications
  8. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Highlighted Products
      1. 2.2.1 LMG3422R030
      2. 2.2.2 ISO7741
      3. 2.2.3 AMC1306M05
      4. 2.2.4 AMC1035
      5. 2.2.5 TPSM560R6H
      6. 2.2.6 TPSM82903
  9. 3System Design Theory
    1. 3.1 Power Switches
      1. 3.1.1 GaN-FET Selection Criterion
      2. 3.1.2 HVBUS Decoupling and 12-V Bootstrap Supply
      3. 3.1.3 GaN_FET Turn-on Slew Rate Configuration
      4. 3.1.4 PWM Input Filter and Dead-Time Calculation
      5. 3.1.5 Signal Level Shifting
      6. 3.1.6 LMG3422R030 Fault Reporting
      7. 3.1.7 LMG3422R030 Temperature Monitoring
    2. 3.2 Phase Current Sensing
      1. 3.2.1 Shunt
      2. 3.2.2 AMC1306M05 Analog Input-Filter
      3. 3.2.3 AMC1306M05 Digital Interface
      4. 3.2.4 AMC1306M05 Supply
    3. 3.3 DC-Link (HV_BUS) Voltage Sensing
    4. 3.4 Phase Voltage Sensing
    5. 3.5 Control Supply
    6. 3.6 MCU Interface
  10. 4Hardware, Software, Testing Requirements, and Test Results
    1. 4.1 Hardware Requirements
      1. 4.1.1 PCB
      2. 4.1.2 MCU Interface
    2. 4.2 Software Requirements
    3. 4.3 Test Setup
      1. 4.3.1 Precautions
      2. 4.3.2 Test Procedure
    4. 4.4 Test Results
      1. 4.4.1 24-V Input Control Supply
      2. 4.4.2 Propagation Delay PWM to Phase Voltage Switch Node
      3. 4.4.3 Switch Node Transient at 320-VDC Bus Voltage
      4. 4.4.4 Phase Voltage Linearity and Distortion at 320 VDC and 16-kHz PWM
      5. 4.4.5 Inverter Efficiency and Thermal Characteristic
        1. 4.4.5.1 Efficiency Measurements
        2. 4.4.5.2 Thermal Analysis and SOA Without Heat Sink at 320 VDC and 16-kHz PWM
  11. 5Design and Documentation Support
    1. 5.1 Design Files
      1. 5.1.1 Schematics
      2. 5.1.2 BOM
      3. 5.1.3 PCB Layout Recommendations
        1. 5.1.3.1 Layout Prints
      4. 5.1.4 Altium Project
      5. 5.1.5 Gerber Files
      6. 5.1.6 Assembly Drawings
    2. 5.2 Tools and Software
    3. 5.3 Documentation Support
    4. 5.4 Support Resources
    5. 5.5 Trademarks
  12. 6About the Author

Signal Level Shifting

GaN-FETs switch faster than IGBTs and the dV/dt slew rate can be 30 V/ns or even higher, as configured in this design. Therefore digital isolators with high common-mode transient immunity (CMTI) of 100 V/ns (TYP) like the ISO7741F quad-channel digital isolator. The suffix F with the ISO7741F help drive the outputs of the device low, if the input power or signal are lost. The ISO7741F has one forward channel for the PWM signal and three channels in the opposite direction for the three fault and temperature reporting signals of the corresponding top-side GaN-FET. The device level shifts the 3.3-V I/O signals to 5-V I/O signals to the corresponding top-side GaN-FETs which refer to the floating switch node GND (SW), as shown in Figure 3-3.

The design has two options to provide the 5-V supply for the top-side digital isolator U4 (ISO7741F) at VCC1, as shown in Figure 3-3. When the external 5-V LDO (U13) is used (default configuration with this design), the resistor R60 and capacitor C64 need to be unpopulated, and R59 needs to be populated. If the 5 V is supplied through the internal 5-V LDO of the LMG3422R030 at pin LDO5V, R59 needs to be unpopulated and R60 and C64 need to be populated.

GUID-20231101-SS0I-7DBM-MJD5-Z3R2TF71N7PQ-low.gifFigure 3-3 Schematic of Digital Isolator-Based Level Shifter for Top-Side GaN-FETs

The ISO7730F triple-channel digital isolator is from the same family that the ISO7741F is and provides a tight propagation match between bottom-side and top-side PWM signals, while translating the 3.3-V CMOS signals from the MCU to 5-V CMOS signals with the LMG4322R030 bottom side GaN-FETs, as shown in Figure 3-4.

GUID-20231101-SS0I-CJZB-VPFZ-H0ZGQNNK1VV7-low.gifFigure 3-4 Schematic of Digital Isolator-Based Level Shifter for Bottom-Side GaN-FETs