TIDUF41A October   2023  – June 2024

 

  1.   1
  2.   Description
  3.   Resources
  4.   Features
  5.   Applications
  6.   6
  7. 1System Description
    1. 1.1 Key System Specifications
  8. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Design Considerations
    3. 2.3 Highlighted Products
      1. 2.3.1 TIOL112
      2. 2.3.2 MSPM0L1306
  9. 3Hardware, Testing Requirements, and Test Results
    1. 3.1 Hardware Requirements
    2. 3.2 Test Setup
    3. 3.3 Test Results
      1. 3.3.1 TCD_PHYL_INTF_TRENHIGH and TCD_PHYL_INTF_TRENLOW
      2. 3.3.2 TCD_PHYL_INTF_UARTTRANSDELAY
      3. 3.3.3 TCD_PHYL_INTF_RESPONSETIME
      4. 3.3.4 TCD_PHYL_INTF_ISIRD
  10. 4Design and Documentation Support
    1. 4.1 Design Files
      1. 4.1.1 Schematics
      2. 4.1.2 BOM
    2. 4.2 Tools and Software
    3. 4.3 Documentation Support
    4. 4.4 Support Resources
    5. 4.5 Trademarks
  11. 5About the Author
  12. 6Revision History

2.2 Design Considerations

This design shows an implementation of the communication back end of a sensor or actuator. The implementation consists of TIOX1X2XEVM, which is the evaluation board of the TIOL112, combined with LP-MSPM0L1306, which is the evaluation board of the MSPM0L1306. Both boards can be stacked together and are ready for evaluation.

By default, the TIOX1X2XEVM comes populated with TIOL1123 and TIOS1023, which include a 3.3V regulator. The default jumper settings of this board require the MSPM0 LaunchPad to be powered separately, to use the internal LDO of the TIOL devices, an additional jumper needs to be added on J9 to VCC.

The current limit on the CQ line of the TIOL112 and TIOS102 can be adjusted by using an external resistor. The evaluation board provides a default resistor value of 25.5kΩ, which equals a current of 200mA. Optionally, a potentiometer is on the board to have an adjustable current limit.

In addition to the IO-Link transceiver, the clocking of the device is also an important aspect. The IO-Link standard requires the baud-rate tolerance to be better than 1%. The internal oscillator of the MSPM0 with an external reference resistor can operate much better than the required 1%. Together with a fractional divider for the UART baud-rate generation, it is possible to stay withing a tolerance of 1% with the resulting UART baud rate.

IO-Link also needs to have a way to store small amounts of configuration data. This can either be stored in the internal flash or in an external EEPROM. The internal flash has the benefit of already being available and does not require external components. However, the internal flash can be limited in size and requires a sector wide erase. During this erase cycle, the flash cannot be accessed and the time can be longer than the desired IO-Link cycle time. In some cases, the limited amount of erase cycles can also become a problem.

An external I2C EEPROM, FRAM, or flash can require more space and more components, but can solve other issues. Depending on the exact application, the one or the other design can be a good approach.