TIDUF42 January   2024

 

  1.   1
  2.   Description
  3.   Resources
  4.   Features
  5.   Applications
  6.   6
  7. 1System Description
    1. 1.1 Terminology
    2. 1.2 Key System Specifications
  8. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Design Considerations
    3. 2.3 Highlighted Products
      1. 2.3.1 EnDAT 2.2 Interface
      2. 2.3.2 SDFM Interface
      3. 2.3.3 EPWM Interface
      4. 2.3.4 ICSS-PRU IEP
      5. 2.3.5 EtherCAT CiA402 Velocity Control
  9. 3System Design
  10. 4Hardware, Software, Testing Requirements, and Test Results
    1. 4.1 Hardware Requirements
    2. 4.2 Software Requirements
    3. 4.3 Test Setup
    4. 4.4 Test Results
  11. 5Design and Documentation Support
    1. 5.1 Design Files
      1. 5.1.1 Schematics
      2. 5.1.2 BOM
    2. 5.2 Tools and Software
    3. 5.3 Documentation Support
    4. 5.4 Support Resources
    5. 5.5 Trademarks
  12. 6About the Author

2.3.2 SDFM Interface

Figure 2-4 illustrates the clock source distribution and Table 2-2 shows the SDFM signals.

GUID-20231024-SS0I-FWHT-7HBV-5JD3LWZRWZ7H-low.svg Figure 2-4 Clock Source Distribution
Table 2-2 SDFM Signals
AM243x LP (PIN NUMBER) BP CONNECTORS BLDC BP SIGNAL NAME
PRG0_PRU0_GPI1(J4) J4.32 SDFM Current High A1 SDFM Current High A1
PRG0_PRU0_GPI3(H1) J2.19 SDFM Current High B1 SDFM Current High B1
PRG0_PRU0_GPI5(F2) J2.13 SDFM Current High C1 SDFM Current High C1
PRG0_PRU0_GPI7(E2) J5.44 SDFM Current High A2 SDFM Current High A2
PRG0_PRU0_GPI8(H5) J2.15 SDFM Current High B2 SDFM Current High B2
PRG0_PRU0_GPO11(L1) J2.12 SDFM Current High C2 SDFM Current High C2

SDFM Clock:

  • PRG0_PRU0_GPO19(G2) → SYNC0 - SDFM CLOCK_OUT1(J5.45) → SDFM_CLOCK_SOURCE[1|2](TP31)
    • AMC_CLKIN_A1, AMC_CLKIN_B1, AMC_CLKIN_C1, PR0_PRU0_SD0_CLK(J4.33), PR0_PRU0_SD1_CLK(J4.31), PR0_PRU0_SD2_CLK(J2.17)
    • AMC_CLKIN_A2, AMC_CLKIN_B2, AMC_CLKIN_C2, PR0_PRU0_SD3_CLK(J5.48), PR0_PRU0_SD6_CLK(J1.5), PR0_PRU0_SD7_CLK(J2.14)

SDFM Interrupts:

  • hwiPrms.intNum = ICSSG_PRU_SDDF_INT_NUM | ICSSG_RTU_SDDF_INT_NUM;
  • hwiPrms.callback = &pruSddfIrqHandler | &rtuSddfIrqHandler;

SDFM Input Data Buffers:

  • gSddfChSamps[0-2] (in .gSddfChSampsRaw) in TCMB of R5F_0_0 for motor 1
  • gSddfChSamps[3-5] (in .gSddfChSampsRaw) in TCMB of R5F_0_1 for motor 2