TIDUF45 May   2024

 

  1.   1
  2.   Description
  3.   Resources
  4.   Features
  5.   Applications
  6.   6
  7. 1System Description
    1. 1.1 Key System Specifications
  8. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Design Considerations
    3. 2.3 Highlighted Products
      1. 2.3.1 ADS127L21
      2. 2.3.2 PGA855
      3. 2.3.3 REF70
  9. 3System Design Theory
  10. 4Hardware, Software, Testing Requirements, and Test Results
    1. 4.1 Hardware Description
      1. 4.1.1 Board Interface
      2. 4.1.2 Power Supplies
      3. 4.1.3 Clocking Tree
    2. 4.2 Software Requirements
    3. 4.3 Test Setup
    4. 4.4 Test Results
      1. 4.4.1 DC Accuracy Tests
      2. 4.4.2 Gain and Offset Temperature Drift
      3. 4.4.3 Nonlinearity
      4. 4.4.4 SNR and Noise Performance
  11. 5Design and Documentation Support
    1. 5.1 Design Files
      1. 5.1.1 Schematics
      2. 5.1.2 BOM
    2. 5.2 Software
    3. 5.3 Documentation Support
    4. 5.4 Support Resources
    5. 5.5 Trademarks
  12. 6About the Author

Features

  • Programmable gain from 0.125V/V to 16V/V
  • Wide bandwidth: 357kHz (Sinc3 filter, max-speed)
  • Configurable digital filter settings for the ADC
  • SNR of 110dB (Sinc4 filter) without the need for high speed ADC input drivers and reference buffers
  • Low gain drift and non-linearity enables high DC accuracy post-calibration

  • At full-scale input: 25°C ± 5°C (post-calibration)

    • Estimated typical: TUE = ± 6ppm, INL ± 2.4ppm
    • Estimated maximum: TUE = ± 32ppm,
      INL ± 12.2ppm
    • Estimated temperature drift (typical)
      • Offset drift: 350nV/°C
      • Gain drift: 1.5ppm/°C
    • Measured from 1unit (post-calibration)
      • TUE: ± 9ppm