TIDUF45 May   2024

 

  1.   1
  2.   Description
  3.   Resources
  4.   Features
  5.   Applications
  6.   6
  7. 1System Description
    1. 1.1 Key System Specifications
  8. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Design Considerations
    3. 2.3 Highlighted Products
      1. 2.3.1 ADS127L21
      2. 2.3.2 PGA855
      3. 2.3.3 REF70
  9. 3System Design Theory
  10. 4Hardware, Software, Testing Requirements, and Test Results
    1. 4.1 Hardware Description
      1. 4.1.1 Board Interface
      2. 4.1.2 Power Supplies
      3. 4.1.3 Clocking Tree
    2. 4.2 Software Requirements
    3. 4.3 Test Setup
    4. 4.4 Test Results
      1. 4.4.1 DC Accuracy Tests
      2. 4.4.2 Gain and Offset Temperature Drift
      3. 4.4.3 Nonlinearity
      4. 4.4.4 SNR and Noise Performance
  11. 5Design and Documentation Support
    1. 5.1 Design Files
      1. 5.1.1 Schematics
      2. 5.1.2 BOM
    2. 5.2 Software
    3. 5.3 Documentation Support
    4. 5.4 Support Resources
    5. 5.5 Trademarks
  12. 6About the Author

4.1.2 Power Supplies

The default state of the TIDA-010945 hardware is that all ADC power supplied are generated using the USB power from the PHI controller. The PGA must be powered with external supplies to connector J7. The PGA855 can be powered with a single supply (8V to 36V) or a dual supply (± 4V to ± 18V). See PGA855 Low-Noise, Wide-Bandwidth, Fully Differential Output Programmable-Gain Instrumentation Amplifier data sheet for detailed power supply recommendations and specifications. The design board is fitted with 36V diodes D1, D2, and D3. This allows for ± 18V bipolar supplies, as well as asymmetrical bipolar power supplies, so long as the supplies are within the recommended operating conditions.

The external power connections can be used in cases where the PHI does not provide the needed voltage. For example, the PHI does not provide bipolar voltages, so if a bipolar supply is needed, an external power supply is required. Change the 0Ω resistor connections (R71, R74, and R81) to use the external power connections for AVDD and IOVDD. J10 is used to power AVDD1, J11 is used to power AVDD2, and J13 is used to power IOVDD. Refer to the recommended operating conditions in the ADS127L21 data sheet for detailed specifications. Connector J12 can optionally be used to supply power to the onboard 5V and –2.5V regulators. In this case, the allowable voltage range for –VinExt is –15.5V < –VinExt < –3.5V and +VinExt is 6V< +VinExt < 15.5V.

The 5.5V voltage from the PHI is regulated to 5V using a low-noise TPS7A4700 LDO. By default, placing the shunt in position 1–2 on jumper JP4 routes 5.5V from the PHI to the LDO. The 5V LDO can also be supplied by external power on J12 by moving the shunt on (JP4) to position 2-3. The 5V LDO output is used for the AVDD connections and can be reprogrammed to different output voltages using R72, R73, R75, R78, R82, and R83. There is an additional LDO that generates –2.5V for AVSS, using the low-noise TPS7A3001 LDO. This LDO is only supplied by external power on J12. By default, AVSS is connected to GND with a shunt on (JP5) 1–2. If AVSS must be set to –2.5V, then connect an external negative supply to J12 and move the shunt on (JP5) to position 2-3.

An external reference can be connected to the board through connector J5. There are appropriate buffers and connections on the board for an external reference. This is not necessary if the on-board voltage reference (REF7040) is used. REF7040 is sufficient to meet the specifications in the ADS127L21 512-kSPS, Programmable Filter, 24-Bit, Wideband Delta-Sigma ADC data sheet

This board is configured with the REF7040, however, the board can easily be replaced with other precision references from TI's catalog of precision series voltage references, such as REF6241. Swapping the reference can require populating R90 and R92 instead of R89 and R93 as some references are not completely pin-to-pin compatible.