TIDUF46 October   2023

 

  1.   1
  2.   Description
  3.   Resources
  4.   Features
  5.   Applications
  6.   6
  7. 1System Description
  8. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Design Considerations
      1. 2.2.1 Multiplexer Network and Switch Strategy
      2. 2.2.2 Cell Balancing
      3. 2.2.3 Stacked AFE Communication
      4. 2.2.4 Isolated UART Interface to MCU
    3. 2.3 Highlighted Products
      1. 2.3.1 BQ79616
      2. 2.3.2 TMUX1308
      3. 2.3.3 TMUX1574
      4. 2.3.4 TMUX1102
      5. 2.3.5 TPS22810
      6. 2.3.6 ISO7742
      7. 2.3.7 TSD05C
      8. 2.3.8 ESD441
      9. 2.3.9 ESD2CAN24-Q1
  9. 3Hardware, Software, Testing Requirements, and Test Results
    1. 3.1 Hardware Requirements
    2. 3.2 Test Setup
    3. 3.3 Test Results
      1. 3.3.1 Cell Voltage Accuracy
      2. 3.3.2 Temperature Sensing Accuracy
      3. 3.3.3 Cell Voltage and Temperature Sensing Timings
      4. 3.3.4 Cell Balancing and Thermal Performance
      5. 3.3.5 Current Consumption
  10. 4Design and Documentation Support
    1. 4.1 Design Files
      1. 4.1.1 Schematics
      2. 4.1.2 BOM
    2. 4.2 Tools and Software
    3. 4.3 Documentation Support
    4. 4.4 Support Resources
    5. 4.5 Trademarks
  11. 5About the Author

3.3.3 Cell Voltage and Temperature Sensing Timings

This test uses one BMU and a BCU. The test point is found in Figure 3-14 including T1-GPIO5, T2-GPIO6, T3-GPIO5, T4-GPIO2, and T5-COML of the bottom BQ79616 device. The test software of Cell Voltage and Temperature Sensing Timings follows the steps in Figure 2-2.

Figure 3-14 shows the cell voltage and temperature sensing timings.

GUID-20230925-SS0I-VRJB-JW6C-G4JCWFRNXKCH-low.png Figure 3-5 Cell Voltage and Temperature Sensing Timings

The test needs eight steps to read all the NTC thermistor voltages. Each step contains a broadcast write to set TMUX1308 and a broadcast read of TSREF and GPIO1 to GPIO2 from all the BQ79616 devices in the stacked BMUs. Reading 2 NTC thermistor voltages for each BQ79616 in the stack is one step and takes 675 μs. Reading all the voltages takes 8 steps and 6.637 ms. The sum of steps for reading all NTC (NTC0 to NTC31) voltages and cell voltages (VCELL1 to VCELL32) for the entire stack of BQ79616 devices takes 8.225 ms.

To easily verify that the configuration of the GPIO1 and GPIO2 pins and TMUX1308 is correct, NTC15 is set as a fixed 100-Ω pulldown that a logic analyzer can recognize as a signal 0. It can be learned that the eight status transfer of TMUX1308 works correctly.