TIDUF48A November   2023  – February 2024 THS6222 , THS6232

 

  1.   1
  2.   Description
  3.   Resources
  4.   Features
  5.   Applications
  6.   6
  7. 1System Description
    1. 1.1 Key System Specifications
  8. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Highlighted Products
      1. 2.2.1 THVD8000DDF
      2. 2.2.2 THS6222RGTT
      3. 2.2.3 MSPM0G350x
      4. 2.2.4 TPS26624DRCR
      5. 2.2.5 LM5164QDDARQ1
      6. 2.2.6 TPS560430X3FDBVR
      7. 2.2.7 TMUX1204DGSR
    3. 2.3 Design Considerations
      1. 2.3.1 Modulator and Carrier Frequency Selection
      2. 2.3.2 Power Consumption and Gain of the THS6222 Line Driver
      3. 2.3.3 Front End and Discrete Filter
      4. 2.3.4 THVD8000 Schematic
      5. 2.3.5 Board Pinout
  9. 3Hardware, Software, Testing Requirements and Test Results
    1. 3.1 Test Setup
      1. 3.1.1 Powering the TIDA-010935
    2. 3.2 Test Results
  10. 4Design and Documentation Support
    1. 4.1 Design Files
      1. 4.1.1 Schematics
      2. 4.1.2 BOM
    2. 4.2 Documentation Support
    3. 4.3 Support Resources
    4. 4.4 Trademarks
  11. 5About the Author
  12. 6Revision History

2.3.2 Power Consumption and Gain of the THS6222 Line Driver

With the selection of a carrier frequency, the modulated signal is fed into a line driver. The TIDA-010935 uses the THS6222 as a line driver, which boosts the incoming signal to 12 V. The THS6222 is a differential broadband buffer with a maximum sinking current of 328 mA.

Total power consumption is obviously dependent on the number of nodes attached on the PLC network with nodes describing individual TIDA-010935 module members. Node members are connected in series to the string inverter DC bus.

Nodes on a string. With the increasing number of members, the required sinking current needs to decrease to reach the signal 12-V peak.

GUID-20231018-SS0I-QVFR-30RM-GMHZVHLRF0DM-low.svg
Figure 2-3 Application Example

Typically, multiple solar panels are attached on a string, each connected in series to reach the input voltage from a solar inverter. The required minimum sinking current is dependent on the total impedance on the PLC network and required signal peak voltage.

Equation 1. 12 V = I s i n k × ˙ Z P L C , N e t
Equation 2. I s i n k = 12 V Z P L C , N e t

The THS6222 features a bias setting input with 4 different modes. Table 2-3 lists all modes of the THS6222 in dependence of bias pin inputs with expected quiescent current consumption.

Table 2-3 Quiescent Current Consumption in Dependence of Bias Modes of the THS6222
BIAS1 BIAS2 MODE QUIESCENT CURRENT AT 50 Ω AND 12-V SUPPLY
0 0 Off 1.1 mA
1 0 Low Bias Mode 10.4 mA
0 1 Mid Bias Mode 15 mA
1 1 Full Bias Mode 19.5 mA

Adjusting the bias setting of the TIDA-010935, allows for greater control over the overall efficiency of the TIDA-010935 or each node, more specifically. Ideally, this reference design is powered by a solar panel and efficiency is very important. The software included adjusts the bias between two modes, namely OFF and TX-MODE. During a transmit phase, the THVD8000 bias settings are set to the TX-MODE, which essentially determines which mode the device needs to use to amplify the modulated signal. After the message has been successfully transmitted, the THVD8000 is shut off to increase efficiency. Additionally, if the device was not put in this mode during receiving a message, signal degradation occurred. This is because if the device is not put in high-impedance mode, or, OFF, a part of the signal current seeps into the device which reduces signal strength.

A proper gain resistor must be selected for the THS6222. The detailed design procedure section of the TPS2662x 60-V, 800-mA Industrial eFuse With Integrated Input and Output Reverse Polarity Protection data sheet describes which gain resistor to select to not bring the amplifier in saturation, if another value is desired. The gain resistor marked R9 is a 1.24-kΩ resistor giving a gain of 3. This way, a 3.3-V input signal does not drive the THS6222 into saturation as a higher gain goes beyond the input supply voltage, thus clamping can happen.

Figure 2-4 shows the schematic of the THS6222 line driver. The bias pins BIAS-1 and BIAS-2 determine the amount of current desired for current sinking. The R9 resistor determines the V/V gain. See the THS6222 data sheet for the maximum possible gain and which resistor is required.

GUID-20231018-SS0I-7DFK-JT7W-FBK5TNCF5NRT-low.svg Figure 2-4 THS6222 Circuit