TIDUF48B November   2023  – November 2024 THS6222 , THS6232

 

  1.   1
  2.   Description
  3.   Resources
  4.   Features
  5.   Applications
  6.   6
  7. 1System Description
    1. 1.1 Key System Specifications
  8. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Highlighted Products
      1. 2.2.1 THVD8000DDF
      2. 2.2.2 THS6222RGTT
      3. 2.2.3 MSPM0G350x
      4. 2.2.4 TPS26624DRCR
      5. 2.2.5 LM5164QDDARQ1
      6. 2.2.6 TPS560430X3FDBVR
      7. 2.2.7 TMUX1204DGSR
    3. 2.3 Design Considerations
      1. 2.3.1 Modulator and Carrier Frequency Selection
      2. 2.3.2 Power Consumption and Gain of the THS6222 Line Driver
      3. 2.3.3 Front End and Discrete Filter
      4. 2.3.4 THVD8000 Schematic
      5. 2.3.5 Board Pinout
  9. 3Hardware, Software, Testing Requirements and Test Results
    1. 3.1 Test Setup
      1. 3.1.1 Powering the TIDA-010935
    2. 3.2 Test Results
  10. 4Design and Documentation Support
    1. 4.1 Design Files
      1. 4.1.1 Schematics
      2. 4.1.2 BOM
    2. 4.2 Documentation Support
    3. 4.3 Support Resources
    4. 4.4 Trademarks
  11. 5About the Author
  12. 6Revision History

Test Results

TIDA-010935 Signal Chain Waveforms at 5 MHzFigure 3-3 Signal Chain Waveforms at 5 MHz
TIDA-010935 Signal Chain Waveforms at 125 kHzFigure 3-4 Signal Chain Waveforms at 125 kHz

Figure 3-3 show the signal chain waveforms, taken from different points on the boards, from top to bottom:

  • Yellow: TX pin taken on the board that is transmitting the data
  • Red: Differential signal taken at the test points TP_FL and TP_D4, after the THS6222 and before the transformers that deliver the signal from one board to the other
  • Blue: Differential signal taken at the test points TP_RX and TP_A, on the receiver board before the THVD8000 demodulation
  • Green: TX pin taken on the board that is receiving data

Observe that the 2 waveforms in the middle of each waveform image also have some signal oscillations when the board is not transmitting any data, due to the fact that the line is used on both directions of communication receiving and transmitting.

The delay between the TX and RX pin is composed by 2 different contributions: a fixed software delay is purposefully placed to ease all the signal chain waveforms visualization and a propagation delay which depends from the demodulating frequency chosen and decrements with the increase of the frequency, which is equal for both falling and rising edges.

Pins FSET0 and FSET1 are responsible for selecting the frequency and the corresponding propagation delays are shown in Table 3-1, the filter response in frequency is shown, with the selected pins FSET0 and FSET1, in Figure 3-5.

Table 3-1 Delay Input-Output Depending on the Chosen Frequency
FSET0FSET1DELAY (µs)FREQUENCY (kHz)
0032125
018.7500
102.52000
011.25000
TIDA-010935 Frequency Response of the 4 Selectable Passive
                    FiltersFigure 3-5 Frequency Response of the 4 Selectable Passive Filters