TIDUF49 February   2024

 

  1.   1
  2.   Description
  3.   Resources
  4.   Features
  5.   Applications
  6.   6
  7. 1System Description
    1. 1.1 Key System Specifications
  8. 2System Overview
    1. 2.1 System Block Diagram
    2. 2.2 Design Considerations
    3. 2.3 Highlighted Products
      1. 2.3.1 DP83RG720S-Q1 (Automotive SPE PHY)
      2. 2.3.2 TPS1HTC30-Q1 (HSS)
      3. 2.3.3 LM5157x-Q1 and LM5158x-Q1 (PSE PoDL Boost Converter)
      4. 2.3.4 LMR38020-Q1 (PD PoDL Buck Converter)
      5. 2.3.5 TPS629210-Q1 (PD 5.0V Rail Buck Converter)
      6. 2.3.6 TPS746-Q1 (PD PHY 3.3V Rail LDO)
      7. 2.3.7 TPS745-Q1 (PSE and PD PHY 1.0V Rail LDO)
  9. 3System Design Theory
    1. 3.1 System Design Consideration for TIDA-020060 (PSE)
      1. 3.1.1 Ethernet PHY
      2. 3.1.2 PHY Power Supply
      3. 3.1.3 PSE Specific PoDL Power Supply
    2. 3.2 System Design Consideration for TIDA-020061 (PD)
    3. 3.3 General Design Consideration for PoDL Coupling Decoupling Network
  10. 4Hardware, Software, Testing Requirements, and Test Results
    1. 4.1 Hardware Requirements
    2. 4.2 Software Requirements
    3. 4.3 Test Setup
    4. 4.4 Test Results
  11. 5Design and Documentation Support
    1. 5.1 Design Files
      1. 5.1.1 Schematics
      2. 5.1.2 BOM
      3. 5.1.3 PCB Layout Recommendations
    2. 5.2 Tools and Software
    3. 5.3 Documentation Support
    4. 5.4 Support Resources
    5. 5.5 Trademarks
  12. 6About the Author

4.2 Software Requirements

This section describes the software requirements for the minimal setup. The Software development kit for DRA829 and TDA4VM Jacinto™ processors is used to control and monitor the DUT during testing.

Alternatively, to be able to configure and monitor TI's automotive SPE PHYs, use DIEP. Debug interface for Ethernet PHYs (DIEP) replaces the USB2MDIO tool and includes a range of state-of-the-art debug tools.