TIDUF60 December 2023
The application parameters to control the motor are written as #define
configuring the PWM, CMPSS, and ADC modules base address in hal.h according to the hardware. The PWM, CMPSS, and ADC of the compressor motor defines are shown in the following codes.
Configure PWM and CMPSS base address for motor drive:
// EPWM
#define MTR1_PWM_U_BASE EPWM2_BASE
#define MTR1_PWM_V_BASE EPWM3_BASE
#define MTR1_PWM_W_BASE EPWM4_BASE
// CMPSS->Iu/Iv/Iw
#define MTR1_CMPSS_U_BASE CMPSSLITE4_BASE
#define MTR1_CMPSS_V_BASE CMPSSLITE2_BASE
#define MTR1_CMPSS_W_BASE CMPSSLITE3_BASE
Configure ADC base address and channels for motor drive:
// Three shunts
// Using ADCA/ADCC for current sensing
#define MTR1_ADC_TRIGGER_SOC ADC_TRIGGER_EPWM2_SOCA // EPWM2_SOCA
#define MTR1_ADC_I_SAMPLEWINDOW 14
#define MTR1_ADC_V_SAMPLEWINDOW 20
#define MTR1_IU_ADC_BASE ADCC_BASE // ADCC-A7/C3*/CMP4 -SOC1
#define MTR1_IV_ADC_BASE ADCA_BASE // ADCA-A4*/C14/CMP2 -SOC2
#define MTR1_IW_ADC_BASE ADCA_BASE // ADCA-A0*/C15/CMP3 -SOC1
#define MTR1_IU_ADCRES_BASE ADCCRESULT_BASE // ADCC-A7/C3*
#define MTR1_IV_ADCRES_BASE ADCARESULT_BASE // ADCA-A4*/C14
#define MTR1_IW_ADCRES_BASE ADCARESULT_BASE // ADCA-A0*/C15
#define MTR1_IU_ADC_CH_NUM ADC_CH_ADCIN3 // ADCC-A7/C3*
#define MTR1_IV_ADC_CH_NUM ADC_CH_ADCIN4 // ADCA-A4*/C14
#define MTR1_IW_ADC_CH_NUM ADC_CH_ADCIN0 // ADCA-A0*/C15
#define MTR1_IU_ADC_SOC_NUM ADC_SOC_NUMBER1 // ADCC-A7/C3* -SOC1-PPB1
#define MTR1_IV_ADC_SOC_NUM ADC_SOC_NUMBER2 // ADCA-A4*/C14 -SOC2-PPB2
#define MTR1_IW_ADC_SOC_NUM ADC_SOC_NUMBER1 // ADCA-A0*/C15 -SOC1-PPB1
#define MTR1_IU_ADC_PPB_NUM ADC_PPB_NUMBER1 // ADCC-A7/C3* -SOC1-PPB1
#define MTR1_IV_ADC_PPB_NUM ADC_PPB_NUMBER2 // ADCA-A4*/C14 -SOC2-PPB2
#define MTR1_IW_ADC_PPB_NUM ADC_PPB_NUMBER1 // ADCA-A0*/C15 -SOC1-PPB1
Configure peripheral interrupt for motor drive control:
// Interrupt
#define MTR1_PWM_INT_BASE MTR1_PWM_U_BASE // EPWM1
#define MTR1_ADC_INT_BASE ADCC_BASE // ADCC-A11/C0*-SOC4
#define MTR1_ADC_INT_NUM ADC_INT_NUMBER1 // ADCC_INT1 -SOC4
#define MTR1_ADC_INT_SOC ADC_SOC_NUMBER4 // ADCC_INT1 -SOC4
#define MTR1_PIE_INT_NUM INT_ADCC1 // ADCC_INT1 -SOC4
#define MTR1_CPU_INT_NUM INTERRUPT_CPU_INT1 // ADCC_INT1-CPU_INT1
#define MTR1_INT_ACK_GROUP INTERRUPT_ACK_GROUP1 // ADCC_INT1-CPU_INT1
Configure the connections between the ADC pin and CMPSS modules in hal.h based on the hardware, the details refer to the Table, Analog Pins, and Internal Connections in the TMS320F280013x Real-Time Microcontrollers Technical Reference Manual
// CMPSS->Iu/Iv/Iw
#define MTR1_CMPSS_U_BASE CMPSSLITE4_BASE
#define MTR1_CMPSS_V_BASE CMPSSLITE2_BASE
#define MTR1_CMPSS_W_BASE CMPSSLITE3_BASE
#define MTR1_IU_CMPHP_SEL ASYSCTL_CMPHPMUX_SELECT_4 // CMPSS4H-A7/C3*
#define MTR1_IU_CMPLP_SEL ASYSCTL_CMPLPMUX_SELECT_4 // CMPSS4L-A7/C3*
#define MTR1_IV_CMPHP_SEL ASYSCTL_CMPHPMUX_SELECT_2 // CMPSS2H-A4*/C14
#define MTR1_IV_CMPLP_SEL ASYSCTL_CMPLPMUX_SELECT_2 // CMPSS2L-A4*/C14
#define MTR1_IW_CMPHP_SEL ASYSCTL_CMPHPMUX_SELECT_3 // CMPSS3H-A0*/C15
#define MTR1_IW_CMPLP_SEL ASYSCTL_CMPLPMUX_SELECT_3 // CMPSS3L-A0*/C15
#define MTR1_IU_CMPHP_MUX 1 // CMPSS4H-A7/C3*
#define MTR1_IU_CMPLP_MUX 1 // CMPSS4L-A7/C3*
#define MTR1_IV_CMPHP_MUX 0 // CMPSS2H-A4*/C14
#define MTR1_IV_CMPLP_MUX 0 // CMPSS2L-A4*/C14
#define MTR1_IW_CMPHP_MUX 2 // CMPSS3H-A0*/C15
#define MTR1_IW_CMPLP_MUX 2 // CMPSS3L-A0*/C15
Configure the trip signals from CMPSS to be passed to EPWM and GPIO output in hal.h based on the hardware, the details refer to Table, ePWM X-BAR MUX Configuration Table and Table, OUTPUT X-BAR MUX Configuration Table in TMS320F280013x Real-Time Microcontrollers Technical Reference Manual.
// XBAR-EPWM
#define MTR1_XBAR_TRIP_ADDRL XBAR_O_TRIP8MUX0TO15CFG
#define MTR1_XBAR_TRIP_ADDRH XBAR_O_TRIP8MUX16TO31CFG
#define MTR1_XBAR_INPUT1 XBAR_INPUT1
#define MTR1_TZ_OSHT1 EPWM_TZ_SIGNAL_OSHT1
#define MTR1_XBAR_TRIP XBAR_TRIP8
#define MTR1_DCTRIPIN EPWM_DC_COMBINATIONAL_TRIPIN8y
// XBAR-EPWM->Iu/Iv/Iw
#define MTR1_IU_XBAR_EPWM_MUX XBAR_EPWM_MUX06_CMPSS4_CTRIPH_OR_L // CMPSS4-HP&LP, A7/C3*
#define MTR1_IV_XBAR_EPWM_MUX XBAR_EPWM_MUX02_CMPSS2_CTRIPH_OR_L // CMPSS2-HP&LP, A4*/C14
#define MTR1_IW_XBAR_EPWM_MUX XBAR_EPWM_MUX04_CMPSS3_CTRIPH_OR_L // CMPSS3-HP&LP, A0*/C15
#define MTR1_IU_XBAR_MUX XBAR_MUX06 // CMPSS4-HP&LP, A7/C3*
#define MTR1_IV_XBAR_MUX XBAR_MUX02 // CMPSS2-HP&LP, A4*/C14
#define MTR1_IW_XBAR_MUX XBAR_MUX04 // CMPSS3-HP&LP, A0*/C15
The related ADC channels are used for motor-current sensing which pins are internally connected to the Comparator Subsystem (CMPSS), configure the CMPSS registers in the HAL_setupCMPSSs() function in the hal.c file as shown in the following codes. Three CMPSS modules are used to implement positive and negative overcurrent protection of U-phase, V-phase, and W-phase of the motor.
void HAL_setupCMPSSsMTR(HAL_MTR_Handle handle)
{
HAL_MTR_Obj *obj = (HAL_MTR_Obj *)handle;
#if defined(DMCPFC_REV3P2) || defined(DMCPFC_REV3P1)
#if !defined(MOTOR1_DCLINKSS) || !defined(MOTOR2_DCLINKSS)
uint16_t cmpsaDACH;
#endif // !(MOTOR1_DCLINKSS || MOTOR2_DCLINKSS)
uint16_t cmpsaDACL;
... ...
#else // !MOTOR1_DCLINKSS, Three-shunt
cmpsaDACH = MTR1_CMPSS_DACH_VALUE;
cmpsaDACL = MTR1_CMPSS_DACL_VALUE;
ASysCtl_selectCMPHPMux(MTR1_IU_CMPHP_SEL, MTR1_IU_CMPHP_MUX);
ASysCtl_selectCMPHPMux(MTR1_IV_CMPHP_SEL, MTR1_IV_CMPHP_MUX);
ASysCtl_selectCMPLPMux(MTR1_IW_CMPLP_SEL, MTR1_IW_CMPLP_MUX);
... ...
return;
} // end of HAL_setupCMPSSs() function
The CMPSS-generated signals go to the X-Bar, where signals can be combined in different and unique fashions to flag unique trip events from multiple sources including external TZ signal from IPM #Fault to implement the fault protection. The faults include the overcurrent signals from the CMPSS and the fault indicator output from the power module. Configure the XBAR registers in HAL_setupMtrFaults() function in the hal.c file as shown in the following codes.
void HAL_setupMtrFaults(HAL_MTR_Handle handle)
{
HAL_MTR_Obj *obj = (HAL_MTR_Obj *)handle;
uint16_t cnt;
// Configure TRIP 7 to OR the High and Low trips from both
// comparator 5, 3 & 1, clear everything first
EALLOW;
HWREG(XBAR_EPWM_CFG_REG_BASE + MTR1_XBAR_TRIP_ADDRL) = 0;
HWREG(XBAR_EPWM_CFG_REG_BASE + MTR1_XBAR_TRIP_ADDRH) = 0;
EDIS;
... ...
// What do we want the OST/CBC events to do?
// TZA events can force EPWMxA
// TZB events can force EPWMxB
EPWM_setTripZoneAction(obj->pwmHandle[cnt],
EPWM_TZ_ACTION_EVENT_TZA,
EPWM_TZ_ACTION_LOW);
EPWM_setTripZoneAction(obj->pwmHandle[cnt],
EPWM_TZ_ACTION_EVENT_TZB,
EPWM_TZ_ACTION_LOW);
... ...
// Clear any spurious fault
EPWM_clearTripZoneFlag(obj->pwmHandle[0], HAL_TZFLAG_INTERRUPT_ALL);
EPWM_clearTripZoneFlag(obj->pwmHandle[1], HAL_TZFLAG_INTERRUPT_ALL);
EPWM_clearTripZoneFlag(obj->pwmHandle[2], HAL_TZFLAG_INTERRUPT_ALL);
return;
}
Configure the GPIOs based on the hardware in HAL_setupGPIOs() in the hal.c file as shown in the following codes.
void HAL_setupGPIOs(HAL_Handle handle)
{
... ...
// GPIO2->EPWM2A->M1_UH
GPIO_setPinConfig(GPIO_2_EPWM2_A);
GPIO_writePin(2, 0);
GPIO_setDirectionMode(2, GPIO_DIR_MODE_OUT);
GPIO_setPadConfig(2, GPIO_PIN_TYPE_STD);
// GPIO3->EPWM2B->M1_UL
GPIO_setPinConfig(GPIO_3_EPWM2_B);
GPIO_writePin(3, 0);
GPIO_setDirectionMode(3, GPIO_DIR_MODE_OUT);
GPIO_setPadConfig(3, GPIO_PIN_TYPE_STD);
... ...
return;
} // end of HAL_setupGPIOs() function
The configuration codes need to be changed in HAL_enableMtrPWM() and HAL_clearMtrFaultStatus() in the hal.h file as below marked in bold according to the used CMPSS for motor control.
static inline void HAL_enableMtrPWM(HAL_MTR_Handle handle)
{
HAL_MTR_Obj *obj = (HAL_MTR_Obj *)handle;
obj->flagEnablePWM = true;
#if defined(DMCPFC_REV3P2) || defined(DMCPFC_REV3P1)
if(obj->motorNum == MTR_1)
{
#if defined(MOTOR1_DCLINKSS)
// Clear any comparator digital filter output latch
CMPSS_clearFilterLatchLow(obj->cmpssHandle[0]);
#else // !MOTOR1_DCLINKSS
// Clear any comparator digital filter output latch
CMPSS_clearFilterLatchHigh(obj->cmpssHandle[0]);
CMPSS_clearFilterLatchHigh(obj->cmpssHandle[1]);
CMPSS_clearFilterLatchLow(obj->cmpssHandle[2]);
... ...
return;
} // end of HAL_enableMtrPWM() function
static inline void HAL_clearMtrFaultStatus(HAL_MTR_Handle handle)
{
HAL_MTR_Obj *obj = (HAL_MTR_Obj *)handle;
... ...
#if defined(HVMTRPFC_REV1P1) || defined(WMINVBRD_REV1P0) || defined(TIDSMPFC_REV3P2)
// Clear any comparator digital filter output latch
CMPSS_clearFilterLatchHigh(obj->cmpssHandle[0]);
CMPSS_clearFilterLatchLow(obj->cmpssHandle[0]);
CMPSS_clearFilterLatchHigh(obj->cmpssHandle[1]);
CMPSS_clearFilterLatchLow(obj->cmpssHandle[1]);
CMPSS_clearFilterLatchHigh(obj->cmpssHandle[2]);
CMPSS_clearFilterLatchLow(obj->cmpssHandle[2]);
... ...
return;
} // end of HAL_clearMtrFaultStatus() function