TIDUF61 May   2024

 

  1.   1
  2.   Description
  3.   Resources
  4.   Features
  5.   Applications
  6.   6
  7. 1System Description
    1. 1.1 Key System Specifications
  8. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Highlighted Products
      1. 2.2.1 TLV9002-Q1
      2. 2.2.2 TLV9034-Q1
      3. 2.2.3 TPS7B69-Q1
      4. 2.2.4 SN74HCS08-Q1
      5. 2.2.5 SN74HCS86-Q1
    3. 2.3 System Design Theory
      1. 2.3.1 TIDA-0020069 Operation
        1. 2.3.1.1 Constant Current Source
          1. 2.3.1.1.1 Design Goals
          2. 2.3.1.1.2 Design Description
          3. 2.3.1.1.3 Design Notes
          4. 2.3.1.1.4 Design Steps
        2. 2.3.1.2 Current Sensing
          1. 2.3.1.2.1 Design Goals
          2. 2.3.1.2.2 Design Description
          3. 2.3.1.2.3 Design Steps
        3. 2.3.1.3 Load Connections and Clamps
        4. 2.3.1.4 Modified Window Comparator
        5. 2.3.1.5 Digital Logic Gates
      2. 2.3.2 Status Indication
        1. 2.3.2.1 Normal Operation (Closed Connection) State
        2. 2.3.2.2 Open Connection State
        3. 2.3.2.3 Short-to-Battery State
        4. 2.3.2.4 Short-to-Ground State
  9. 3Hardware, Testing Requirements, and Test Results
    1. 3.1 Hardware Requirements
    2. 3.2 Test Setup
    3. 3.3 Test Results
      1. 3.3.1 Normal Operation (Closed Connection) Test Results
      2. 3.3.2 Open Connection Test Results
      3. 3.3.3 Short-to-Battery Test Results
      4. 3.3.4 Short-to-Ground Test Results
      5. 3.3.5 Disable (Shutdown) Test Results
  10. 4Design Files
    1. 4.1 Schematics
    2. 4.2 Bill of Materials
    3. 4.3 PCB Layout Recommendations
      1. 4.3.1 Layout Prints
    4. 4.4 Altium Project
    5. 4.5 Gerber Files
    6. 4.6 Assembly Drawings
  11. 5Tools and Software
  12. 6Documentation Support
  13. 7Support Resources
  14. 8Trademarks
  15. 9About the Author

2.2.5 SN74HCS86-Q1

SN74HCS08-Q1 contains four independent 2-input XOR Gates with Schmitt-trigger inputs. Each gate performs the Boolean function Y = A × B in positive logic.

This device includes balanced CMOS push-pull outputs. The term balanced indicates that the device can sink and source similar currents. The outputs of this device are capable of driving larger currents than the device can sustain without being damaged. It is important for the output power of the device to be limited to avoid damage due to overcurrent. Leave unused push-pull CMOS outputs disconnected.

This device includes inputs with the Schmitt-trigger architecture. These inputs are high impedance. The Schmitt-trigger input architecture provides hysteresis, which makes this device extremely tolerant to slow or noisy inputs.

The inputs and outputs to this device have both positive and negative clamping diodes.

TIDA-020069 SN74HCS86-Q1 Block Diagram Figure 2-6 SN74HCS86-Q1 Block Diagram

Key features of the SN74HCS86-Q1 include:

  • AEC-Q100 qualified for automotive applications:
    • Device temperature grade 1: –40°C to 125°C, TA
    • Device HBM ESD classification level 2
    • Device CDM ESD classification level C6
  • Wide operating voltage range: 2V to 6V
  • Schmitt-trigger inputs allow for slow or noisy input signals
  • Low power consumption
    • Typical Icc of 100nA
    • Typical input leakage current of ±100nA
  • ±7.8mA output drive at 6V