TIDUF61 May   2024

 

  1.   1
  2.   Description
  3.   Resources
  4.   Features
  5.   Applications
  6.   6
  7. 1System Description
    1. 1.1 Key System Specifications
  8. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Highlighted Products
      1. 2.2.1 TLV9002-Q1
      2. 2.2.2 TLV9034-Q1
      3. 2.2.3 TPS7B69-Q1
      4. 2.2.4 SN74HCS08-Q1
      5. 2.2.5 SN74HCS86-Q1
    3. 2.3 System Design Theory
      1. 2.3.1 TIDA-0020069 Operation
        1. 2.3.1.1 Constant Current Source
          1. 2.3.1.1.1 Design Goals
          2. 2.3.1.1.2 Design Description
          3. 2.3.1.1.3 Design Notes
          4. 2.3.1.1.4 Design Steps
        2. 2.3.1.2 Current Sensing
          1. 2.3.1.2.1 Design Goals
          2. 2.3.1.2.2 Design Description
          3. 2.3.1.2.3 Design Steps
        3. 2.3.1.3 Load Connections and Clamps
        4. 2.3.1.4 Modified Window Comparator
        5. 2.3.1.5 Digital Logic Gates
      2. 2.3.2 Status Indication
        1. 2.3.2.1 Normal Operation (Closed Connection) State
        2. 2.3.2.2 Open Connection State
        3. 2.3.2.3 Short-to-Battery State
        4. 2.3.2.4 Short-to-Ground State
  9. 3Hardware, Testing Requirements, and Test Results
    1. 3.1 Hardware Requirements
    2. 3.2 Test Setup
    3. 3.3 Test Results
      1. 3.3.1 Normal Operation (Closed Connection) Test Results
      2. 3.3.2 Open Connection Test Results
      3. 3.3.3 Short-to-Battery Test Results
      4. 3.3.4 Short-to-Ground Test Results
      5. 3.3.5 Disable (Shutdown) Test Results
  10. 4Design Files
    1. 4.1 Schematics
    2. 4.2 Bill of Materials
    3. 4.3 PCB Layout Recommendations
      1. 4.3.1 Layout Prints
    4. 4.4 Altium Project
    5. 4.5 Gerber Files
    6. 4.6 Assembly Drawings
  11. 5Tools and Software
  12. 6Documentation Support
  13. 7Support Resources
  14. 8Trademarks
  15. 9About the Author

2.3.1 TIDA-0020069 Operation

Figure 2-7 Functional Block Diagram

As Figure 2-7 shows, the TPS7B69-Q1 low-dropout (LDO) voltage regulator is used to step down the supply voltage from the 12V battery to 5V. All other components throughout the signal chain, including the HVIL signal, operate from this 5V rail.

The TLV9002-Q1 operational amplifier (op amp) is used to generate a constant current output for the HVIL signal chain. This is shown as the output of Ch 2 in Figure 2-7. The value of this constant current can be configured by varying the passive components, as shown in Section 2.3.1.1. This constant current flows through the HVIL signal cable within the high-voltage connectors. The resistance of the high-voltage connectors and HVIL cable are used to calculate the expected voltage drop between the HVIL-Send TP and HVIL-Return TP test points.

This constant current output of the amplifier can also be disabled using the Disable Input logic signal. When disabled, the output current of the amplifier decreases by a factor of 100. This creates a fault condition similar to the short-to-battery fault, where the voltage difference between the HVIL-Send TP and HVIL-Return TP is minimal. This disable feature can be used to save on power, and to force an error reading on the output until all other systems are ready for HVIL measurements. Other amplifiers like TLV9061-Q1 and OPA310-Q1, feature integrated shutdown functionality via an extra pin controlled by a logic input, which can also be utilized in place of the TLV9002-Q1.

The other channel of the TLV9002-Q1 op amp is used for current sensing. This channel is configured as a difference amplifier across a shunt resistor placed in series with the load resistors. Under normal operation (closed connection of all high-voltage connectors), the output of this amplifier is set to mid-supply. During open connection (disconnect of high-voltage cables), the current through the shunt resistor is zero and the amplifier outputs 0V. This amplifier also outputs lower voltages during the two fault conditions of short-to-battery and short-to-ground. This current sensing provides feedback and redundancy.

The analog values of HVIL-Send TP and HVIL-Return TP can be output to a microprocessor with integrated analog-to-digital converters (ADC) to determine the HVIL states. However, this design simplifies computation efforts by converting these two analog values into four binary values. The TLV9034-Q1 is a quad-channel comparator that is used to convert the two analog values, HVIL-Send TP and HVIL-Return TP, into two 2-bit binary values. A modified window comparator circuit, detailed in Section 2.3.1.4, compares the HVIL-Send TP and HVIL-Return TP against Upper Threshold and Lower Threshold to generate 2-bit binary outputs. The four binary outputs from the modified window comparators are called HVIL-Send Logic-Higher, HVIL-Send Logic-Lower, HVIL-Return Logic-Higher, and HVIL-Return Logic-Lower. The voltage thresholds for the window comparator are set using resistor dividers and can be configured per design requirements.

The 2-bit binary output of each modified window comparator can be determined using the logic in Table 2-1 and Table 2-2.

Table 2-1 HVIL-Send Binary Output Logic
PARAMETER HVIL-SEND LOGIC-LOWER TP HVIL-SEND LOGIC-HIGHER TP
HVIL-Send TP < Lower Threshold 0V 0V
Lower Threshold < HVIL-Send TP < Upper Threshold 5V 0V
HVIL-Send TP > Upper Threshold 5V 5V
Table 2-2 HVIL-Return Binary Output Logic
PARAMETER HVIL-RETURN LOGIC-LOWER TP HVIL-RETURN LOGIC-HIGHER TP
HVIL-Return TP < Lower Threshold 0V 0V
Lower Threshold < HVIL-Return TP < Upper Threshold 5V 0V
HVIL-Return TP > Upper Threshold 5V 5V

Figure 2-8 illustrates the expected values for HVIL-Send and HVIL-Return with respect to the Upper Threshold and Lower Threshold for each of the four states. Each state has a unique placement for the HVIL-Send and HVIL-Return.

TIDA-020069 TIDA-020069 State Logic Thresholds Figure 2-8 TIDA-020069 State Logic Thresholds

The SN74HCS08-Q1 AND gates and SN74HCS86-Q1 XOR gates are used to control the LED status indicators on the board based on the binary outputs from the modified window comparator (HVIL-Send Logic-Higher, HVIL-Send Logic-Lower, HVIL-Return Logic-Higher, and HVIL-Return Logic-Lower). Section 2.3.1.5 details the logic tree. Only one status LED indicator is on at a time, and follows Figure 2-8.