TIDUF63A December 2023 – June 2024
A totem-pole topology was selected in this micro inverter reference design. The totem-pole topology presents higher performance and lower cost with respect to other DC/AC topologies. A drawback of the totem-pole is the high-common mode noise with respect to other DC/AC topologies such as H-bridge, bipolar, or Highly Efficient and Reliable Inverter Concept (HERIC). Conversely, the isolation between panels and grid features significant reduction of the leakage current flowing from DC to AC. The totem pole is designed to operate in Continuous Conduction Mode (CCM). This allows for lower conduction losses and a better EMI picture versus Discontinuous Conduction Mode (DCM) because of lower peak-to-peak ripple current. Figure 1-5 shows a block diagram of this topology.
In totem-pole DC/AC, there are two half-bridges. One is operating at high-frequency and another one at line frequency. The high-frequency switches are based on GaN technology to achieve 125-kHz switching frequency for sinusoidal grid current control.
Low-frequency switches are operating as a grid voltage rectifier. During the negative half-cycle switch Q4 is continuously on and Q3 is off, when the half-cycle is positive switch Q4 is off and switch Q3 is continuously on. Note that both of the half-bridges need to have a dead-time to avoid shoot-through.
The current in the grid is measured and then controlled by the MCU using Proportional Resonant (PR) controllers. High-accuracy measurement of the current flowing in the Point of Common Coupling (PCC) is required to control active and reactive power. The current control requires the implementation of a Phase Locked Loop (PLL) which is synchronized with the grid voltage. A DC link voltage control loop is used to control the amplitude of the active current sink or source from the grid.