TIDUF69 March   2024 LMX1204

 

  1.   1
  2.   Description
  3.   Resources
  4.   Features
  5.   Applications
  6.   6
  7. 1System Description
  8. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Design Considerations
    3. 2.3 Highlighted Products
      1. 2.3.1 LMX1204
      2. 2.3.2 TPS62913
      3. 2.3.3 TPS7A4700
  9. 3Hardware, Software, Testing Requirements, and Test Results
    1. 3.1 Hardware Requirements
    2. 3.2 Test Setup
    3. 3.3 Test Results
  10. 4Design and Documentation Support
    1. 4.1 Design Files
      1. 4.1.1 Schematics
      2. 4.1.2 BOM
    2. 4.2 Tools and Software
    3. 4.3 Documentation Support
    4. 4.4 Support Resources
    5. 4.5 Trademarks
  11. 5About the Author

3.3 Test Results

Figure 3-3 shows the clock performance from one output at 12.8GHz compared to a standard SMA100B signal generator. There is no noticeable phase noise degradation due to the cascaded LMX1204 out to 1MHz offset. Afterward, the degradation at the higher frequency offsets is attributed to a higher thermal noise floor of the cascaded devices.

GUID-20220112-SS0I-PJ1T-1J4K-ZNHJ5TGRPFCH-low.svg Figure 3-3 Cascaded LMX1204 vs R&S SMA100B Phase Noise Response