TIDUF72 August 2024
The ADC131M03 and ADS131M02 device registers must be initialized to deliver proper measurement data on all relevant analog input channels. Figure 3-1 is followed at every start of the metrology application as well as each time the Calibrating and Viewing Results From PC metrology calibration procedure is performed.
The SPI module of the MSPM0+ MCU is configured as a controller device that uses 4-wire mode (the two chip-select signals are automatically asserted high and low by the SPI hardware module). After the SPI is set up, all interrupts are disabled and a reset pulse on the SYNC_RESET line is sent from the MSPM0+ MCU. Interrupts are then re-enabled and the MSPM0+ MCU sends SPI write commands sequential to ADS131M02 to configure the registers and then repeats the initialization step with AMC131M03:
The MSPM0+ MCU is configured at start-up to generate a port interrupt whenever a falling edge occurs on any of the two DRDY pins, which indicate that new measurement samples are available.
The ADC modulator clock is derived from the clock fed to the CLKIN pin which gets internally divided by two, to generate the ADC modulator clock. Equation 3 shows the definition of the sampling frequency of the ADC.
where
In this design, the M0_CLKOUT signal of the MSPM0+ MCU has a frequency of 8.192MHz. The oversampling ratio is selected to be 1024 with the appropriate register setting. As a result, the ADC modulator clock for both ADCs is set to 4.096MHz and the sample rate is set to 4000 samples per second.
For a single-phase system where each line-to-neutral voltage is measured, at least one ADS device is necessary to independently measure the phase voltage and current. In this design, the following ADC channel mappings are used in software for the single-phase and split-phase configuration: