TIDUF72 August   2024

 

  1.   1
  2.   Description
  3.   Resources
  4.   Features
  5.   Applications
  6.   6
  7. 1System Description
    1. 1.1 Key System Specifications
    2. 1.2 End Equipment
    3. 1.3 Electricity Meter
    4. 1.4 Power Quality Meter, Power Quality Analyzer
  8. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Design Considerations
      1. 2.2.1 Magnetic Tamper Detection With TMAG5273 Linear 3D Hall-Effect Sensor
      2. 2.2.2 Analog Inputs of Standalone ADCs
      3. 2.2.3 Voltage Measurement Analog Front End
      4. 2.2.4 Analog Front End for Current Measurement
    3. 2.3 Highlighted Products
      1. 2.3.1 AMC131M03
      2. 2.3.2 ADS131M02
      3. 2.3.3 MSPM0G1106
      4. 2.3.4 TMAG5273
      5. 2.3.5 ISO6731
      6. 2.3.6 TRS3232E
      7. 2.3.7 TPS709
  9. 3Hardware, Software, Testing Requirements, and Test Results
    1. 3.1 Hardware Requirements
      1. 3.1.1  Software Requirements
      2. 3.1.2  UART for PC GUI Communication
      3. 3.1.3  Direct Memory Access (DMA)
      4. 3.1.4  ADC Setup
      5. 3.1.5  Foreground Process
      6. 3.1.6  Formulas
        1. 3.1.6.1 Standard Metrology Parameters
        2. 3.1.6.2 Power Quality Formulas
      7. 3.1.7  Background Process
      8. 3.1.8  Software Function per_sample_dsp()
      9. 3.1.9  Voltage and Current Signals
      10. 3.1.10 Pure Waveform Samples
      11. 3.1.11 Frequency Measurement and Cycle Tracking
      12. 3.1.12 LED Pulse Generation
      13. 3.1.13 Phase Compensation
    2. 3.2 Test Setup
      1. 3.2.1 Power Supply Options and Jumper Setting
      2. 3.2.2 Electricity Meter Metrology Accuracy Testing
      3. 3.2.3 Viewing Metrology Readings and Calibration
        1. 3.2.3.1 Calibrating and Viewing Results From PC
      4. 3.2.4 Calibration and FLASH Settings for MSPM0+ MCU
      5. 3.2.5 Gain Calibration
      6. 3.2.6 Voltage and Current Gain Calibration
      7. 3.2.7 Active Power Gain Calibration
      8. 3.2.8 Offset Calibration
      9. 3.2.9 Phase Calibration
    3. 3.3 Test Results
      1. 3.3.1 Energy Metrology Accuracy Results
  10. 4Design and Documentation Support
    1. 4.1 Design Files
      1. 4.1.1 Schematics
      2. 4.1.2 BOM
      3. 4.1.3 PCB Layout Recommendations
      4. 4.1.4 Layout Prints
      5. 4.1.5 Altium Project
      6. 4.1.6 Gerber Files
      7. 4.1.7 Assembly Drawings
    2. 4.2 Tools and Software
    3. 4.3 Documentation Support
    4. 4.4 Support Resources
    5. 4.5 Trademarks
  11. 5About the Authors

2.3.5 ISO6731

To add isolation to the RS-232 connection to a PC, the isolated RS-232 portion of this reference design uses capacitive galvanic isolation, which has an inherent life span advantage over an opto-isolator. In particular, industrial devices are usually pressed into service for much longer periods of time than consumer electronics; therefore, maintenance of effective isolation over a period of 15 years or longer is important.

The ISO6731 device is a high-performance, triple-channel digital isolator designed for cost-sensitive applications requiring up to 5000VRMS isolation ratings per UL 1577. This device is also certified by VDE, TUV, CSA, and CQC. The ISO6731 device provides high electromagnetic immunity and low emissions at low-power consumption, while isolating CMOS or LVCMOS digital I/Os. Each isolation channel has a logic input and output buffer separated by TI's double capacitive silicon dioxide (SiO2) insulation barrier. This device comes with enable pins which can be used to put the respective outputs in high impedance for multi-host driving applications.

The ISO6731 device has two forward channels and one reverse-direction channel. In the event of input power or signal loss, the default output is high for the device without suffix F and low for the device with suffix F. In this design, two isolation channels are used for the TX and RX in RS-232 communication mode. This chip supports a signaling rate of 50Mbps and operates from a 1.71V to 1.89V and 2.25V to 5.5V supply in the temperature range: –40°C to +125°C.