TIDUF73 September   2024

 

  1.   1
  2.   Description
  3.   Resources
  4.   Features
  5.   Applications
  6.   6
  7. 1System Description
  8. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Design Considerations
      1. 2.2.1 Design Theory
      2. 2.2.2 Resistor Selection
        1. 2.2.2.1 Transistor and Diode Selection
      3. 2.2.3 Overcurrent Detection – Short-Circuit Protection
    3. 2.3 Highlighted Products
      1. 2.3.1 TPSI3100-Q1
      2. 2.3.2 INA180-Q1
      3. 2.3.3 TPSI2140-Q1
  9. 3Hardware, Software, Testing Requirements, and Test Results
    1. 3.1 Hardware Requirements
      1. 3.1.1 External Hardware Requirements
    2. 3.2 Test Setup
    3. 3.3 Test Results
  10. 4Design and Documentation Support
    1. 4.1 Design Files
      1. 4.1.1 Schematics
      2. 4.1.2 BOM
    2. 4.2 Tools
    3. 4.3 Documentation Support
    4. 4.4 Support Resources
    5. 4.5 Trademarks
  11. 5About the Author

2.3.1 TPSI3100-Q1

The TPSI3100-Q1 is a fully integrated isolated switch driver, which when combined with an external power switch, forms a complete isolated solid-state relay design. With a gate drive voltage of 15.8V with 1.5A, 2.5A peak source current or sink current, a large availability of power switches can be used to meet many application needs. The TPSI3100-Q1 generates a secondary bias supply from power received on the primary side, so no isolated secondary supply bias is required. The TPSI3100-Q1 provides additional power through the nominal 5V rail (VDDM) for use by auxiliary circuits to perform various function such as current and voltage monitoring or remote temperature detection.

The TPSI3100-Q1 also integrates a communication back channel that transfers status information from the secondary side to the primary side. When the comparator input FLT1_CMP exceeds the voltage reference, the driver is immediately asserted low and FLT1 is also driven low, indicating to the system that a fault has occurred. This is useful for disabling the external switch with low latency on critical events, such as overcurrent detection. When the comparator input, ALM1_CMP, exceeds the voltage reference, ALM1 signal is asserted low, but no action is taken by the driver. This can be useful as an alarm or warning indicator for overtemperature or overvoltage events.

In this design, a 5V supply powers the primary side pins VDDP and CE with 1100nF input capacitance. An external 5V signal is tied to the EN pin. The signal pins PGOOD, nFLT, and nALM are tied to a pull-up network. Lastly, the VSSP pins are tied to ground together.

On the secondary side, the capacitors between VDDH and VDDM, VDDM and VSSS, named CDIV1 and CDIV2, respectively, are chosen to maintain a ratio of 1:3, or in other words CDIV2 = 3 × CDIV1. The current-sense amplifier of the overcurrent detection circuit is powered from the VDDM pin. The RESP pin is tied to VSSS with a 100kΩ resistor and FLM1_CMP and ALM1_CMP pins are tied to the resistor divider of the overcurrent detection circuit.