TIDUF76 June   2024

 

  1.   1
  2.   Description
  3.   Resources
  4.   Features
  5.   Applications
  6.   6
  7. 1System Description
    1. 1.1 Why use Radar?
    2. 1.2 TI Corner Radar Design
    3. 1.3 Key System Specification
  8. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Design Considerations
    3. 2.3 Highlighted Products
      1. 2.3.1 AWRL1432 Single-Chip Radar Solution
      2. 2.3.2 AWRL1432BOOST-BSD Evaluation Module
      3. 2.3.3 TCAN4550-Q1 Integrated CAN-FD Controller and Transceiver
    4. 2.4 System Design Theory
      1. 2.4.1  Antenna Configuration
      2. 2.4.2  Chirp Configuration and System Performance
      3. 2.4.3  Data Path
      4. 2.4.4  Chirp Timing
      5. 2.4.5  Memory Allocation
      6. 2.4.6  Frame Reconfiguration
      7. 2.4.7  Vmax Extension
      8. 2.4.8  Group Tracker
      9. 2.4.9  Dynamic Clutter Removal
      10. 2.4.10 CAN-FD Transceiver
  9. 3Hardware, Software, Testing Requirements, and Test Results
    1. 3.1 Required Hardware and Software
      1. 3.1.1 Hardware
      2. 3.1.2 Software and GUI
    2. 3.2 Test Setup
    3. 3.3 Test Results
  10. 4Design and Documentation Support
    1. 4.1 Design Files
      1. 4.1.1 Schematics
      2. 4.1.2 BOM
    2. 4.2 Tools and Software
    3. 4.3 Documentation Support
    4. 4.4 Support Resources
    5. 4.5 Trademarks

2.4.6 Frame Reconfiguration

The timing diagram of the BSD demo processing chain during the startup and the first two frames is illustrated in Figure 2-5. The BSD demo processing chain differs from the typical SDK processing chain in the way the frames are triggered. In the typical SDK OOB demo processing chain, the RF front end is set up for an infinite sequence of frame numbers, and the RF drives the frames according to a given frame period. In contrast, in this processing chain, the RF front end is configured for only one frame, and the RTOS timer is set at the given frame rate.

Upon the RTOS timer ISR execution, the RF front end is reconfigured and initiated to run one frame at a time. Consequently, every other frame, the chirp idle time is toggled, resulting in the alternating “slow” and “fast” frames. This alternation represents the required behavior for the operation of the maximum velocity extension feature.