TIDUF78 May 2024
The TMAG5170 supports a 4-wire SPI. The primary communication between the device and the external microcontroller is through the SPI bus that provides full-duplex communication. The external microcontroller works as the SPI controller that sends command requests on the SDI pin and receives device responses on the SDO pin. The TMAG5170 device works as the SPI peripheral device that receives command requests and sends responses (such as status and measured values) to the external microcontroller over the SDO line. The TMAG5170 supports a fixed 32-bit frame size to communicate with a controller device. The 32-bit frame can be configured through DATA_TYPE register bits to support a regular single register read or write data packet, or a special packet to read two-channel data simultaneously.
The serial clock SCLK represents the host controller clock signal. This clock determines the speed of data transfer and all receiving and sending are done synchronously to this clock. The output data on the SDO pin transitions on the falling edge of the SCK and input data on the SDI pin is latched on the rising edge of the SCLK.
The nCS activates the SPI. As long as the nCS signal is high, the TMAG5170 does not accept the SCLK signal or the serial-data-in (SDI), and the serial-data-out (SDO) is in high impedance. The nCS needs to be held low for the duration of a communication frame without toggling to maintain proper communication. The SPI is disabled each time nCS is brought from low to high.