TIDUF78 May   2024

 

  1.   1
  2.   Description
  3.   Resources
  4.   Features
  5.   Applications
  6.   Design Images
  7. 1System Description
    1. 1.1 Key System Specifications
  8. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Design Considerations
    3. 2.3 Highlighted Products
  9. 3System Design Theory
    1. 3.1 Hardware Design
    2. 3.2 Software Design
      1. 3.2.1 TMAG5170 SPI Frame
        1. 3.2.1.1 Serial Data In 32-Bit Frame
        2. 3.2.1.2 Serial Data Out 32-Bit Frame
      2. 3.2.2 TMAG5170 Register Configuration
      3. 3.2.3 SPI and Start-of-Conversion Timing
      4. 3.2.4 Linear Position Calculation
  10. 4Hardware, Software, Testing Requirements, and Test Results
    1. 4.1 Hardware
      1. 4.1.1 PCB Overview
      2. 4.1.2 MCU Interface Connector
    2. 4.2 Test Setup
    3. 4.3 Test Results
      1. 4.3.1 Magnetic Z and X Field Measurement
      2. 4.3.2 Linear Position Measurement
      3. 4.3.3 SPI Signal Measurement
  11. 5Design and Documentation Support
    1. 5.1 Design Files
      1. 5.1.1 Schematics
      2. 5.1.2 BOM
      3. 5.1.3 PCB Layout
        1. 5.1.3.1 Layout Prints
        2. 5.1.3.2 Layout Guidelines
    2. 5.2 Tools and Software
    3. 5.3 Documentation Support
    4. 5.4 Support Resources
    5. 5.5 Trademarks
  12. 6About the Author

Serial Data Out 32-Bit Frame

The Serial-data-out (SDO) line is used by the controller to read the data from the TMAG5170. The TMAG5170 shifts out command responses and ADC conversion data serially with each rising SCK edge when the CS pin is low. This pin assumes a high-impedance state when CS is high. Based off the DATA_TYPE bit setting, the TMAG5170 supports two different SDO frames:

  • Regular 32-Bit SDO Read frame
  • Special 32-Bit SDO Read

The Regular 32-Bit SDO Read frame is used for TMAG5170 configuration in this reference design. The Special 32-Bit SDO Read frame is used in this design to read the read the Z-axis and X-axis magnetic field strength in a single frame for lowest latency.

With DATA_TYPE = 000b, the TMAG5170 supports a regular 16-bit register read during the 32-bit SDO frame as explained in Figure 3-3. In this read mode, 12-bit status bits are displayed. All the status bits except for the ERROR_STAT bit are directly read from the status registers. The ERROR_STAT bit indicates if any error bit set in the device.

TIDA-060045 TMAG5170 Regular 32-Bit SDO
                    Frame Figure 3-3 TMAG5170 Regular 32-Bit SDO Frame

With DATA_TYPE > 000b, the TMAG5170 supports a special 32-bit SDO frame for two-channel simultaneous data read. Each channel data is limited to 12 bits. This feature is useful for systems requiring faster data throughput while performing multi-axis measurements. Figure 3-4 explains the detail construction of the special 32-bit SDO frame. When the device is set to special 32-bit read, the device continues to deliver the 2-channel data set through the SDO line during consecutive read or write cycles. DATA_TYPE bits must be reset to get back to a regular read cycle. Only four status bits are transmitted in this mode. All the status bits except for the ERROR_STAT bit are directly read from the status registers. The ERROR_STAT bit indicates if any error bit set in the device. The status bits, STAT[2:0] can be changed based off CMD1 value in the previous frame.

TIDA-060045 TMAG5170 Special 32-Bit SDO
                    Frame Figure 3-4 TMAG5170 Special 32-Bit SDO Frame

For more information on the TMAG5170 SPI such as CRC refer to the TMAG5170 data sheet.