TIDUF78 May 2024
The Serial-data-out (SDO) line is used by the controller to read the data from the TMAG5170. The TMAG5170 shifts out command responses and ADC conversion data serially with each rising SCK edge when the CS pin is low. This pin assumes a high-impedance state when CS is high. Based off the DATA_TYPE bit setting, the TMAG5170 supports two different SDO frames:
The Regular 32-Bit SDO Read frame is used for TMAG5170 configuration in this reference design. The Special 32-Bit SDO Read frame is used in this design to read the read the Z-axis and X-axis magnetic field strength in a single frame for lowest latency.
With DATA_TYPE = 000b, the TMAG5170 supports a regular 16-bit register read during the 32-bit SDO frame as explained in Figure 3-3. In this read mode, 12-bit status bits are displayed. All the status bits except for the ERROR_STAT bit are directly read from the status registers. The ERROR_STAT bit indicates if any error bit set in the device.
With DATA_TYPE > 000b, the TMAG5170 supports a special 32-bit SDO frame for two-channel simultaneous data read. Each channel data is limited to 12 bits. This feature is useful for systems requiring faster data throughput while performing multi-axis measurements. Figure 3-4 explains the detail construction of the special 32-bit SDO frame. When the device is set to special 32-bit read, the device continues to deliver the 2-channel data set through the SDO line during consecutive read or write cycles. DATA_TYPE bits must be reset to get back to a regular read cycle. Only four status bits are transmitted in this mode. All the status bits except for the ERROR_STAT bit are directly read from the status registers. The ERROR_STAT bit indicates if any error bit set in the device. The status bits, STAT[2:0] can be changed based off CMD1 value in the previous frame.
For more information on the TMAG5170 SPI such as CRC refer to the TMAG5170 data sheet.