TIDUF87 November   2024

 

  1.   1
  2.   Description
  3.   Resources
  4.   Features
  5.   Applications
  6.   6
  7. 1System Description
    1. 1.1 Key System Specifications
  8. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Design Considerations
      1. 2.2.1 Current and Voltage Controller
      2. 2.2.2 DC/DC Start-Up
      3. 2.2.3 High-Resolution PWM Generation
    3. 2.3 Highlighted Products
      1. 2.3.1 TMS320F28P650DK
      2. 2.3.2 ADS8588S
  9. 3Hardware, Software, Testing Requirements, and Test Results
    1. 3.1 Hardware Requirements
    2. 3.2 Software Requirements
      1. 3.2.1 Opening the Project Inside Code Composer Studio
      2. 3.2.2 Project Structure
      3. 3.2.3 Software Flow Diagram
    3. 3.3 Test Setup
      1. 3.3.1 Hardware Setup to Tune the Current and Voltage Loop
      2. 3.3.2 Hardware Setup to Test Bidirectional Power Flow
      3. 3.3.3 Hardware Setup for Current and Voltage Calibration
    4. 3.4 Test Procedure
      1. 3.4.1 Lab Variables Definitions
      2. 3.4.2 Lab 1. Open-Loop Current Control Single Phase
        1. 3.4.2.1 Setting Software Options for Lab 1
        2. 3.4.2.2 Building and Loading the Project and Setting up Debug Environment
        3. 3.4.2.3 Running the Code
      3. 3.4.3 Lab 2. Closed Loop Current Control Single Phase
        1. 3.4.3.1 Setting Software Options for Lab 2
        2. 3.4.3.2 Building and Loading the Project and Setting up Debug Environment
        3. 3.4.3.3 Running the Code
      4. 3.4.4 Lab 3. Open Loop Voltage Control Single Channel
        1. 3.4.4.1 Setting Software Options for Lab 3
        2. 3.4.4.2 Building and Loading the Project and Setting up Debug Environment
        3. 3.4.4.3 Running the Code
      5. 3.4.5 Lab 4. Closed Loop Current and Voltage Control Single Channel
        1. 3.4.5.1 Setting Software Options for Lab 4
        2. 3.4.5.2 Building and Loading the Project and Setting up Debug Environment
        3. 3.4.5.3 Running the Code
      6. 3.4.6 Lab 5. Closed Loop Current and Voltage Control Four Channels
        1. 3.4.6.1 Setting Software Options for Lab 5
        2. 3.4.6.2 Building and Loading the Project and Setting up Debug Environment
        3. 3.4.6.3 Running the Code
      7. 3.4.7 Calibration
    5. 3.5 Test Results
      1. 3.5.1 Current Loop Load Regulation
      2. 3.5.2 Current Loop Linearity Test
      3. 3.5.3 Voltage Loop Linearity Test
      4. 3.5.4 DCM Start-Up
      5. 3.5.5 Bidirectional Current Switching Time
      6. 3.5.6 Thermal Performance
  10. 4Design and Documentation Support
    1. 4.1 Design Files
      1. 4.1.1 Schematics
      2. 4.1.2 BOM
    2. 4.2 Tools and Software
    3. 4.3 Documentation Support
    4. 4.4 Support Resources
    5. 4.5 Trademarks
  11. 5About the Author

Setting Software Options for Lab 2

  1. To run this lab, make sure the hardware is set up as outlined in the previous section, Figure 3-9
  2. Open the CCS project as outlined in Section 3.2.1. If using the powerSUITE, go to Step 3, otherwise, jump to Step 4.
  3. Open the SYSCONFIG page and select under the Build Options section:
    • Select Lab 2: Closed Loop CC Single Channel for the Lab
    • Select the Channel
    • Enable the SFRA
    • Open the Compensation Designer TIDA-010090 by clicking the Run Compensation Design button.
    • The compensation designer then launches and prompts the user to select a valid SFRA data file. Import the SFRA data from the run in Lab 1 into the compensation designer to design a two-pole, two-zero compensator. Keep more margins during this iteration of the design to make sure that when the loop is closed, the system is stable.
    • Figure 3-18 shows compensation parameters for the Current Loop.
    • Click on the Save Comp button to save the compensation. Close the Compensation Designer tool.
    • Save the SYSCONFIG page.
  4. When using non-powerSuite version of the project, Build Settings are directly modified in solution_settings.h file. Compensation Designer is found at C2000Ware_DigitalPower_Install_Location\powerSUITE\source\utils.
    #define LAB_NUMBER (2)
    #define CHANNEL_NUMBER (1)
    #define SFRA_ENABLED (true)
TIDA-010090 Build Options for Lab
                    2 Figure 3-17 Build Options for Lab 2
TIDA-010090 Tuning Current Loop Using
                    Compensation Designer Figure 3-18 Tuning Current Loop Using Compensation Designer