TIDUF88 October 2024
The design uses the asymmetric bridge topology to achieve an accuracy of ±20% when insulation impedance (RisoP and RisoN) is no less than 50kΩ, and 10kΩ maximum error when insulation impedance is less than 50kΩ.
SW is the switch to connect PE and the isolation impedance monitor circuit. SW is switched on once the isolation impedance monitor function starts. To get a high accuracy isolation impedance, use the following several steps:
Figure 2-4 shows insulation impedance monitor circuit. The working voltage across the TPSI2140 contact is designed to be kept under 1000V with the paralleled the resistor RH and series R1. RH is 1.5MΩ and R1 is 3MΩ. RH and R1 are 0.1% accuracy resistors. R2 is 4.5MΩ with 0.1% accuracy. In the worst-case scenario that RisoN is short-circuited and TPSI2140 is switched off, R1, RH and TPSI2140 together endure all bus voltage. In this case, the voltage across the TPSI2140 is 1000V.
In step 1 through 3, VDC, VNoff, and VNon can be measured with BQ79731 and can be calculated using Equation 2 and Equation 3.
The accuracy of calculating can be as high as 10% when RisoP and RisoN are in range from 50kΩ to 10MΩ at room temperature.
In consideration of ADC error and resistor error, the worst case of insulation impedance estimation is 7.5% when RisoP equals 50kΩ and RisoN is unlimited in room temperature.