TIDUF94 October   2024

 

  1.   1
  2.   Description
  3.   Resources
  4.   Features
  5.   Applications
  6.   6
  7. 1System Description
    1. 1.1 Key System Specifications
  8. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Design Considerations
    3. 2.3 Highlighted Products
      1. 2.3.1 DP83TC818S-Q1 (Automotive SPE PHY)
      2. 2.3.2 TPS7B8233-Q1 (3.3V Vsleep Ultra-Low-IQ Low-Dropout Regulator)
      3. 2.3.3 TPS74701-Q1 (1.0V Rail Low-Dropout Regulator)
      4. 2.3.4 CDC6CE025000-Q1 (BAW Oscillator)
      5. 2.3.5 TPS4H160-Q1 (High-Side Switch)
  9. 3System Design Theory
    1. 3.1 Ethernet PHY
      1. 3.1.1 Ethernet PHY Power Supply
      2. 3.1.2 Ethernet PHY Clock Source
    2. 3.2 Power Coupling Network
      1. 3.2.1 High-Side Switch
  10. 4Hardware, Software, Testing Requirements, and Test Results
    1. 4.1 Hardware Requirements
    2. 4.2 Software Requirements
    3. 4.3 Test Setup
    4. 4.4 Test Results
  11. 5Design and Documentation Support
    1. 5.1 Design Files
      1. 5.1.1 Schematics
      2. 5.1.2 BOM
    2. 5.2 Tools and Software
    3. 5.3 Documentation Support
    4. 5.4 Support Resources
    5. 5.5 Trademarks
  12. 6About the Author

1 System Description

The Jacinto™ 7 EVMs are development on evaluation platforms that enable developers to write software and develop hardware around the Jacinto™ 7 family of processors. The main elements of the system are available on the EVM. This gives developers the basic resources needed for most general-purpose type projects that encompass the Jacinto™ 7 processor. Beyond the basic resources provided, additional functionality can be added through expansion cards.

This reference design adds four automotive Ethernet connections through TI's automotive Ethernet PHYs. The DP83TC818S-Q1 automotive Ethernet PHY supports 100Mbps link speed, is IEEE 802.3bw and OA 100BASE-T1 compliant, supports IEEE 1588v2, 802.1AS time synchronization, supports IEEE 1722 CRF packet decoding and Audio Video Bridging (AVB) media clock generation and supports IEEE 802.1AE MACsec. The DP83TG721 automotive Ethernet PHY supports 1000Mbps link speed, is IEEE 802.3bp compliant, IEEE 1588v2, 802.1AS time synchronization and has AVB IEEE 1722 media clock generation capability.