TIDUF97 September 2024
In this reference design, the MSPM0G3507 integrated dual ADCs convert the TMAG6180’s sine and cosine output signals. The MSPM0G3507 ADC are configured for 64-times hardware averaging and are simultaneous and periodically triggered by an internal 32kHz Timer0. The ADC end-of- conversion triggers an interrupt at which the two ADC conversion results and the status of the Hall latches Q0 and Q1 are read and the absolute angle is calculated.
When the host controller sends a command request to get position data, the controller triggers a UART interrupt in the MSPM0. Then the transmit data is stored to an array, and the DMA controller starts the UART transmission to the host controller.
The Timer0 interrupt is phase locked to encoder read command frequency from the host controller to minimize angle transmission latency and jitter.