Raise the AC input to 120VRMS VL-L and
208VRMS VL-L, 50/60Hz. Figure 3-30 shows a rectified current that is going to be drawn from the input.
CH1 (Blue): DCBUS
output voltage
CH2 (Light blue):
AC input phase A voltage
CH3 (Pink): IGBT
gate voltage
CH4 (Green): AC
Input phase A current
Figure 3-30 Build Level 4: Scope
Capture Ia and Va (120VRMS L-N) With PWM Tripped
Bus voltage is set by the vBusRef variable,
and is about 1.55V already, which corresponds to 650V for this design.
Start the PFC action by writing a 1 to the
clearTrip variable.
The board now draws the sinusoidal current. Figure 3-31 shows the scope capture.
CH1 (Blue): DCBUS output voltage
CH2 (Light blue): AC input phase A voltage
CH3 (Pink): IGBT gate voltage
CH4 (Green): AC Input phase A current
Figure 3-31 Build Level 4: Scope
Capture Ia and Va (120VRMS L-N) With Full PFC
Check the Expressions window shown in Figure 3-32. The DC bus voltages is also balanced, that is, the
guiVbusPM and guiVbusMN variables are
almost equal, which shows that the closed loop balance controller is
working.
Figure 3-32 Build Level 4:
Expressions Window With 120VAC and 650VDC
The balance loop open loop gain is controlled by the
Gs_GainKp variable and can be adjusted in case the
bandwidth is not enough. Though, for the balance loop, the bandwidth needs to be
lower than the outer voltage loop and only 1Hz to 2Hz of bandwidth is
sufficient.
To bring the system to a safe stop bring the input AC voltage down to
zero, observe the guiVBus variable comes down to zero as
well.
Fully halting the MCU when in real-time mode is a two-step process. First, halt
the processor by using the Halt button on the toolbar () or by using
Target > Halt. Then take the MCU out of real-time mode by
clicking on the
button. Finally reset the MCU by selecting the button.
Close the CCS debug session by clicking on Terminate Debug Session
(Target > Terminate all). .