TIDUFB8 December   2024

 

  1.   1
  2.   Description
  3.   Resources
  4.   Features
  5.   Applications
  6.   6
  7. 1System Description
    1. 1.1 Key System Specifications
    2. 1.2 End Equipment
    3. 1.3 Electricity Meter
  8. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Design Considerations
      1. 2.2.1 Voltage Measurement – Analog Front End
      2. 2.2.2 Current Measurement Analog Front End
      3. 2.2.3 Input Voltage
      4. 2.2.4 Clock
    3. 2.3 Highlighted Products
      1. 2.3.1 AMC130M02
      2. 2.3.2 MSPM0G1106
      3. 2.3.3 LMK6C
      4. 2.3.4 TLV76133
  9. 3Hardware, Software, Testing Requirements, and Test Results
    1. 3.1 Hardware Requirements
    2. 3.2 Software Requirements
      1. 3.2.1 Formulas
      2. 3.2.2 Metrology Software Process
        1. 3.2.2.1 UART for PC GUI Communication
        2. 3.2.2.2 Direct Memory Access (DMA)
        3. 3.2.2.3 ADC Setup
        4. 3.2.2.4 Foreground Process
        5. 3.2.2.5 Background Process
        6. 3.2.2.6 Software Function per_sample_dsp ()
        7. 3.2.2.7 Frequency Measurement and Cycle Tracking
        8. 3.2.2.8 LED Pulse Generation
    3. 3.3 Test Setup
      1. 3.3.1 Power Supply and Jumper Settings
      2. 3.3.2 Viewing Metrology Readings and Calibration
      3. 3.3.3 Calibration
        1. 3.3.3.1 Voltage and Current Offset Calibration
        2. 3.3.3.2 Voltage and Current Gain Calibration
        3. 3.3.3.3 Active Power Gain Calibration
        4. 3.3.3.4 Offset Calibration
        5. 3.3.3.5 Phase Calibration
    4. 3.4 Test Results
      1. 3.4.1 Electricity Meter Metrology Accuracy Results
  10. 4Design and Documentation Support
    1. 4.1 Design Files
      1. 4.1.1 Schematics
      2. 4.1.2 BOM
      3. 4.1.3 PCB Layout Recommendations
        1. 4.1.3.1 Layout Prints
      4. 4.1.4 Altium Project
      5. 4.1.5 Gerber Files
      6. 4.1.6 Assembly Drawings
    2. 4.2 Tools and Software
    3. 4.3 Documentation Support
    4. 4.4 Support Resources
    5. 4.5 Trademarks
  11. 5About the Author

3.2.2.3 ADC Setup

The AMC130M02 device register must be initialized to deliver proper measurement data on all relevant analog input channels. Figure 3-1 is followed at every start of the metrology application.

The SPI module of the MSPM0+ MCU is configured as a controller device that uses 4-wire mode. After the SPI is set up, all interrupts are disabled and a reset pulse on the SYNC_RESET line is sent from the MSPM0+ MCU. Interrupts are then re-enabled and the MSPM0+ MCU sends SPI write commands to AMC130M02:

  • MODE register settings: 16-bit CCITT CRC used, 24-bit length for each word in the AMC131M03 data packet, the DRDY signal is asserted on the most lagging enabled channel, DRDY is asserted high when the conversion value is not available, DRDY is asserted low when the conversion values are ready.
  • GAIN1 register settings for Voltage and Current: PGA gain = 1 used for the voltage channel, measuring the line-to-neutral, PGA gain = 16 for the current channels on Phase A and Neutral.
  • CHx_CFG register settings (where x is the channel number: 0, 1): two ADC channel inputs connected to external ADC pins and the channel phase delay set to 0 for each channel (the software phase compensation in the SDK middleware is used instead of hardware phase compensation)
  • CLOCK register settings: 1024 OSR, all channels enabled, and high-resolution modulator power mode

The MSPM0+ MCU is configured at start-up to generate a port interrupt whenever a falling edge occurs on the DRDY pins, which indicate that new measurement samples are available.

TIDA-010960 ADC Initialization Procedure Figure 3-1 ADC Initialization Procedure

The ADC modulator clock is derived from the clock fed to the CLKIN pin which gets internally divided by two, to generate the ADC modulator clock. Equation 13 shows the definition of the sampling frequency of the ADC.

Equation 13. f s =   f M O S R =   f C L K I N 2 × O S R

where

  • ƒS is the sampling rate
  • ƒM is the modulator clock frequency
  • ƒCLKIN is the clock fed to the AMC130M02 CLKIN pin
  • OSR is the selected oversampling ratio

In this design, the CLKIN pin gets Clock from an external oscillator at a fixed frequency of 8.192MHz. The oversampling ratio is selected to be 1024 with the appropriate register setting. The sample rate is set to 4000 samples per second.

This design uses the following AMC130M02 channel mappings:

  • AIN0P and AIN0N AMC130M02 ADC channel pins → Voltage
  • AIN1N and AIN1P AMC130M02 ADC channel pins → Shunt Current (this can measure either the neutral or line current)