TIDUFB8 December   2024

 

  1.   1
  2.   Description
  3.   Resources
  4.   Features
  5.   Applications
  6.   6
  7. 1System Description
    1. 1.1 Key System Specifications
    2. 1.2 End Equipment
    3. 1.3 Electricity Meter
  8. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Design Considerations
      1. 2.2.1 Voltage Measurement – Analog Front End
      2. 2.2.2 Current Measurement Analog Front End
      3. 2.2.3 Input Voltage
      4. 2.2.4 Clock
    3. 2.3 Highlighted Products
      1. 2.3.1 AMC130M02
      2. 2.3.2 MSPM0G1106
      3. 2.3.3 LMK6C
      4. 2.3.4 TLV76133
  9. 3Hardware, Software, Testing Requirements, and Test Results
    1. 3.1 Hardware Requirements
    2. 3.2 Software Requirements
      1. 3.2.1 Formulas
      2. 3.2.2 Metrology Software Process
        1. 3.2.2.1 UART for PC GUI Communication
        2. 3.2.2.2 Direct Memory Access (DMA)
        3. 3.2.2.3 ADC Setup
        4. 3.2.2.4 Foreground Process
        5. 3.2.2.5 Background Process
        6. 3.2.2.6 Software Function per_sample_dsp ()
        7. 3.2.2.7 Frequency Measurement and Cycle Tracking
        8. 3.2.2.8 LED Pulse Generation
    3. 3.3 Test Setup
      1. 3.3.1 Power Supply and Jumper Settings
      2. 3.3.2 Viewing Metrology Readings and Calibration
      3. 3.3.3 Calibration
        1. 3.3.3.1 Voltage and Current Offset Calibration
        2. 3.3.3.2 Voltage and Current Gain Calibration
        3. 3.3.3.3 Active Power Gain Calibration
        4. 3.3.3.4 Offset Calibration
        5. 3.3.3.5 Phase Calibration
    4. 3.4 Test Results
      1. 3.4.1 Electricity Meter Metrology Accuracy Results
  10. 4Design and Documentation Support
    1. 4.1 Design Files
      1. 4.1.1 Schematics
      2. 4.1.2 BOM
      3. 4.1.3 PCB Layout Recommendations
        1. 4.1.3.1 Layout Prints
      4. 4.1.4 Altium Project
      5. 4.1.5 Gerber Files
      6. 4.1.6 Assembly Drawings
    2. 4.2 Tools and Software
    3. 4.3 Documentation Support
    4. 4.4 Support Resources
    5. 4.5 Trademarks
  11. 5About the Author

3.2.2.5 Background Process

Figure 2-3 shows the different events that occur when sampling voltage and current, where the items in green are done by the MSPM0G1106 hardware modules.

TIDA-010960 Voltage and Current Sampling Events Figure 3-3 Voltage and Current Sampling Events

New current samples for each phase are ready every OSR, or 1024 modulation clock cycles for this design, thus resulting in 4000 samples per second over the SPI bus to MSPM0+ MCU. Once new samples are ready, the DRDY pin causes a GPIO interrupt on the MSPM0+ MCU, which triggers the Port ISR, and the background process is run within the Port ISR.

Figure 3-4 shows the background process, which mainly deals with timing-critical events in the test software.

TIDA-010960 Background Process Figure 3-4 Background Process