Input | ADC Input | Digital Output ADS7042 |
---|---|---|
VinMIn | 210 mV | 0x105 |
VinMax | 3.09 V | 0xEFB |
Power Supplies |
---|
AVDD |
3.3 V |
Design Description
This document describes how to design a circuit to directly monitor temperature using a thermistor with a successive approximation register (SAR) analog-to-digital (ADC). This temperature sensing circuit monitors a temperature range from –25°C to 100°C using a negative temperature coefficient (NTC) thermistor in series with a resistor to form a voltage-divider. This voltage divider has the effect of producing an output voltage that is inversely related to the monitored temperature. The source voltage to the resister divider is the analog power supply (AVDD) to the analog to digital converter, ADS7142, which, for this device, is also the reference. By connecting the resistor divider to the reference input, AVDD, the measurements will be ratiometric which will ensure that variations in the reference voltage will not impact the overall accuracy. The capacitor in parallel with the input resistor is used to support ADC input settling performance.
Thermistors are used to monitor temperature in applications such as appliances, wireless environmental sensors, and smoke and heat detectors. In these applications, the thermistor voltage changes slowly thus it is not necessary to sample at high sampling rates. This means that there is no need for a driving input amplifier to condition the input voltage. A similar circuit design, Driving SAR directly without a front-end buffer circuit, explains how to measure introduced drift from external components which can prove to be helpful in these applications.
Specifications
Specification | Calculated | Simulated |
---|---|---|
Sampling Rate | < 10 kHz | 10 kHz, settling to ½ LSB |
Temperature range | –25°C to 100°C | –25°C to 100°C |
ADC input range | 210 mV to 3.09 V | 212 mV to 3.09 V |
Design Notes
Component Selection
where
Temperature range in Kelvin:
Thermistor resistance values:
R1 = √(R@373.15K ∙ R @248.15K) = √(6.849 kΩ ∙ 1,469.744 kΩ) = 100.333 kΩ
Using the Analog Engineer Calculator can help design this value based on the operation of the system and values from the ADC data sheet. Within the calculator tool, select Data Converters > ADC Drive Without Amplifier, then select the Sampling Rate Given Rin and Cin tab. Use this tool to solve for C1 based on the calculated sampling rate achievable, Fsamp(max). Within this window, enter the ADC sample-and-hold capacitor, 15pF, the parallel equivalent of the resister divider at the worst-case settling scenario which is when the NTC is at the max resistive value, 93.627kΩ, the max conversion time, 1.8us, and the ADC resolution, 12. The initial Cfilt value entered should be 20 × the ADC sample-and-hold capacitor, in this case 15 pF ∙ 20 = 300 pF. Entering this value results in the maximum sample rate to be less the desired 10 kHz. From here, decrease Cfilt to a value that results in Fsamp(max) to be equal to or greater than 10 kHz. In this case, C1 resulted to a value of 100 pF.
Design Simulation Model
The following schematic of the first order model of ADS7142 was built using the steps explained in TI Precision Labs –ADS: Building the SAR ADC model in TINA SPICE. The ADC sampling rate is set at 10 kHz.
Temperature Transfer Characteristics
The linear NTC voltage range for the desired temperature range of –25°C to 100°C is within the ADC input range and uses 87% of the ADC full scale range. The following equation is used to solve for the temperature measurement based on the resistor divider measured by the ADC. This does not include system calibration or system tolerances.
where:
Transient DC Input Start-Up and Settling
Expected start-up time varies by the NTC resistance state. The following graph displays the maximum resistance value the NTC will experience, as this is the worst-case scenario for ADC input settling. The Verror graph shows that the input settling error is less than half of an LSB, ±402 μV, at the end of each acquisition period. See TI Precision Labs: Drive ADC Input for an explanation of ADC settling.
Small Layout
The ADS7142 is a dual-channel I2C ADC in a small X2QFN package size of 1.5 mm × 2 mm. The following image is a system-level solution using the ADS7142 with two NTCs connected at each analog input, though each input can monitor different types of sensors.
Design Featured Devices
Device | Key Features | Link | Other Possible Devices |
---|---|---|---|
ADS7142(1) | 12-bit resolution, I2C, autonomous monitor, dual-channel single-ended input, small package size: 1.5 mm × 2 mm | ADS7142 | http://www.ti.com/adcs |
ADS7042(1) | 12-bit resolution, SPI, 1MSPS sample rate, single-ended input, AVDD, Vref input range 1.6 V to 3.6 V | ADS7042 | http://www.ti.com/adcs |
Design References
See Analog Engineer's Circuit Cookbooks for TI's comprehensive circuit library.
Link to Key Simulation Files
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