All trademarks are the property of their respective owners.
TI qualification testing is a risk mitigation process that is engineered to assure device longevity in customer applications. Wafer fabrication process and package level reliability are evaluated in a variety of ways that may include accelerated environmental test conditions with subsequent derating to actual use conditions. Manufacturability of the device is evaluated to verify a robust assembly flow and assure continuity of supply to customers, TI MLS Products are qualified with industry standard test methodologies performed to the intent of Joint Electron Devices Engineering Council (JEDEC) standards and procedures. Texas Instruments MLS Products are certified to meet GEIA-STD-0002-1 Aerospace Qualified Electronic Components.
A new device can be qualified either by performing full-scale quality and reliability test on the actual device or using previously qualified devices through qualification by similarity (QBS) rules. By establishing similarity between the new device and those qualified previously, repetitive tests are eliminated, allowing for timely production release. When adopting the QBS methodology, the emphasis is on qualifying the differences between a previously qualified product and the new product under consideration. The QBS rules for a technology, product, test parameter, or package shall define which attributes are required to remain fixed in order for the QBS rules to apply. The attributes that are expected and allowed to vary are reviewed and a QBS plan shall be developed, based on the reliability impact assessment above, specifying what subset of the full complement of environmental stresses is required to evaluate the reliability impact of those variations. Each new device shall be reviewed for the conformance to the QBS rule sets applicable to the device. See JEDEC JESD47 for more information.
TI Device: | ADS1278MHFQ-MLS | Assembly Site: | Subcon- Microchip Tech (Thailand) | |
---|---|---|---|---|
DLA VID: | Not Applicable | Test Site: | TI-Taiwan | |
Wafer Fab: | TSMC-WF3 | Pin/Package Type: | Ceramic Quad Flatpack | 84 | |
Fab Process: | TSMC 0.35UM DPQM 3.3 V/5 V | Leadframe: | Not applicable for ceramic | |
Fab Technology: | TSMC 0.35UM | Termination Finish: | Au | |
Die Revision: | D | Bond Wire: | 25.4 µm Al | |
ESD CDM: | ±500 V | Moisture Sensitivity: | Not applicable for Ceramic | |
ESD HBM: | ±2000 V | |||
1Baseline information in effect as of the date of this report |
Note that qualification by similarity (“qualification family”) per JEDEC JESD47 is allowed | ||||
---|---|---|---|---|
Description | Condition | Sample Size Used/Rejects | Lots Required | Test Method |
Electromigration | Maximum Recommended Operating Conditions | N/A | N/A | Per TI Design Rules |
Electrical Characterization | TI Data Sheet | 30 | 1 | N/A |
Electrostatic Discharge Sensitivity | HBM | 3 units/voltage | 1 | EIA/JESD22-A114 |
CDM | EIA/JESD22-C101 | |||
Latch-up 25°C and 125°C | Per Technology | 6/0 | 1 | EIA/JESD78 |
C1 Life Test | 140°C / 500 hours or equivalent | 47/0 | 1 | MIL-STD-883/Method 1005 |
Temperature Cycle | –65°C to +150°C non-biased for 500 cycles | 15/0 | N/A | MIL-STD-883/TM1010, Cond C |
Visual Quality Reliability Inspection | Post Temp Cycle | 2/0 | 1 | Per TI Design Rules |
B2 Resistance to Solvents | Ink symbol only | 3/0 | 2 | MIL-STD-883/Method 2015 |
B3 Solderability | 245C +/-5%, 22 leads from each unit (3 unit minimum) | 3/0 | 1 | MIL-STD-883/Method 2003 |
B5 Bond Strength | Destructive Bond Pull Test, 15 wires pull from each unit (4 unit minimum) | 4/0 | 3 | MIL-STD-883/Method 2011 |
D3 Sequence | 15 Th/S+100 TC + Moist Resis | 15/0 | 3 | MIL-PRF-38535 |
D4 Sequence | Mech Shock + Vibration + Const Acc | 15/0 | 1 | MIL-PRF-38535 |
Die Shear | Per die size | 3/0 | 1 | MIL-STD-883/Method 2019 |
Radiation Response Characterization | Total Ionization Dose, and Single-Event Latch-up | 5 units/dose level | 1 | MIL-STD-883/Method 1019 |
TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING REFERENCE DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS” AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS.
These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable standards, and any other safety, security, or other requirements. These resources are subject to change without notice. TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource. Other reproduction and display of these resources is prohibited. No license is granted to any other TI intellectual property right or to any third party intellectual property right. TI disclaims responsibility for, and you will fully indemnify TI and its representatives against, any claims, damages, costs, losses, and liabilities arising out of your use of these resources.
TI’s products are provided subject to TI’s Terms of Sale (www.ti.com/legal/termsofsale.html) or other applicable terms available either on ti.com or provided in conjunction with such TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for TI products.
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2022, Texas Instruments Incorporated