The ADC3660EVM is an evaluation board used to evaluate the ADC3660 analog-to-digital converter (ADC) from Texas Instruments. The ADC3660EVM is a dual-channel, 14-bit ADC that can operate up to 65 Mega-samples per second (MSPS). The ADC3660 uses a serial CMOS (SCMOS) interface to output the data. The serialized CMOS interface supports output rates to 250 Mbps which translates to ~ 15 MSPS (2-wire) to ~ 3.75 MSPS (0.5-wire) output rates after complex decimation. Hence the ADC3660 can be operated in 'oversampling + decimating' mode using the internal decimation filter in order to improve the dynamic range and relax external anti-aliasing filter.
The ADC3660EVM is equipped with the following features:
This hardware setup procedure is written to use the onboard CDC clocking option. Interrnal clock operation.
Ensure that jumper J8 is shunted in the 2-3 position. This allows 5 V to be supplied to the ADC3660EVM through the mini-USB connector.
If an external 5-V supply is desired, J8 must be shunted in the 1-2 position, and the external 5 V can be connected to the test point labeled "+5 EXT".
The following equipment is included in the EVM evaluation kit:
The following equipment is not included in the EVM evaluation kit, but is required for evaluation of this EVM:
TI recommends the following generators:
Bandpass filter for the analog input signal. The following recommended bandpass filter will have:
This is the start of your concept.
Download the most recent version of the HSDC Pro software. Follow the installation instructions to install the software.
Download and install the HSDC Pro Patch. This patch copies all the INI files required to the HSDC pro directory.