Design Goals

Design Description

This inverting dual-supply to single-supply amplifier translates a ±10V signal to a 0V to 5V signal for use with an ADC. Levels can easily be adjusted using the given equations. The buffer can be replaced with other ±15V configurations to accommodate the desired input signal, as long as the output of the first stage is low impedance.

Design Notes

1. Observe common-mode limitations of the input buffer.
2. A high-impedance source will alter the gain characteristics of U₂ if buffer amplifier U1 is not used.
3. R₆ provides a path to ground for the output of U₁ if the ±15V supplies come up before the 5V supply. This limits the voltage at the inverting pin of U₂ through the voltage divider created by R₁, R₂, and R₆ and prevents damage to U₂ as well as to any converter that may be connected to its output. To best protect the devices a transient voltage suppressor (TVS) should be used at the power pins of U₂.
4. A capacitor across R₅ will help filter V_ref and provide a cleaner V_shift.

Design Steps

The transfer function for this circuit follows:

1. Set the gain of the amplifier.
   $\frac{∆{\mathrm{V}}_{\mathrm{o}}}{∆{\mathrm{V}}_{\mathrm{i}}}=\frac{{\mathrm{V}}_{\mathrm{oMax}}-{\mathrm{V}}_{\mathrm{oMin}}}{{\mathrm{V}}_{\mathrm{iMax}}-{\mathrm{V}}_{\mathrm{iMin}}}=\frac{\text{4.8 }\mathrm{V}-\text{0.2 }\mathrm{V}}{\text{10 }\mathrm{V}-(-\text{10 }\mathrm{V})}=0.23$
   $\frac{∆{\mathrm{V}}_{\mathrm{o}}}{∆{\mathrm{V}}_{\mathrm{i}}}=\frac{{\mathrm{R}}_2}{{\mathrm{R}}_1}$
   ${\mathrm{R}}_2=\text{0.23×}{\mathrm{R}}_1$
   $\mathrm{Choose} {\mathrm{R}}_1=\text{100}\mathrm{k\Omega } (\mathrm{standard} \mathrm{value})$
   ${\mathrm{R}}_2=\text{23}\mathrm{k\Omega } (\mathrm{for} \mathrm{standard} \mathrm{values} \mathrm{use} \text{22}\mathrm{k\Omega } \mathrm{and} \text{1}\mathrm{k\Omega } \mathrm{in} \mathrm{series})$
2. Set V_shift to translate the signal to single supply.
   $\mathrm{At} \mathrm{midscale}, {\mathrm{V}}_{\mathrm{in}}=\text{0}\mathrm{V}$
   $\mathrm{Then} {\mathrm{V}}_{\mathrm{o}}=\left(1+\frac{{\mathrm{R}}_2}{{\mathrm{R}}_1}\right)\times {\mathrm{V}}_{\mathrm{shift}}$
   ${\mathrm{V}}_{\mathrm{shift}} = \frac{{\mathrm{V}}_{\mathrm{o}}}{\left(1+{\displaystyle \frac{{\mathrm{R}}_2}{{\mathrm{R}}_1}}\right)}=\frac{\text{2.5}\mathrm{V}}{\text{1.23}}=\text{2.033}\mathrm{V}$
3. Select resistors for reference voltage divider to achieve V_shift.
   ${\mathrm{V}}_{\mathrm{ref}}=\text{4.096}\mathrm{V}$
   ${\mathrm{V}}_{\mathrm{shift}}={\mathrm{V}}_{\mathrm{ref}}\times \frac{{\mathrm{R}}_5}{({\mathrm{R}}_3+{\mathrm{R}}_4)+{\mathrm{R}}_5}$
   $\frac{{\mathrm{V}}_{\mathrm{shift}}}{{\mathrm{V}}_{\mathrm{ref}}}=\frac{\text{2.033}\mathrm{V}}{\text{4.096}\mathrm{V}}=\frac{{\mathrm{R}}_5}{({\mathrm{R}}_3+{\mathrm{R}}_4)+{\mathrm{R}}_5}$
   ${\mathrm{R}}_3+{\mathrm{R}}_4=\text{1.0161 }\times {\mathrm{R}}_5$
   $\mathrm{Select} \mathrm{a} \mathrm{standard} \mathrm{value} \mathrm{for} {\mathrm{R}}_5$
   ${\mathrm{R}}_5=\text{10}\mathrm{k\Omega }$
   ${\mathrm{R}}_3+{\mathrm{R}}_4=\text{10.161}\mathrm{k\Omega }$
   ${\mathrm{R}}_3=\text{10}\mathrm{k\Omega }$
   ${\mathrm{R}}_4=\text{162}\mathrm{\Omega } (\mathrm{standard} 1\% \mathrm{value})$
4. Large feedback resistors can interact with the input capacitance and cause instability. Choose C₁ to add a pole to the transfer function to counteract this. The pole must be lower in frequency than the effective bandwidth of the op amp.
   ${\mathrm{C}}_1=\text{43}\mathrm{pF}$

Design Simulations

DC Simulation Results

AC Simulation Results

Transient Simulation Results

Design References

Texas Instruments, SBOMAT9 TINA-TI™ circuit simulation, file download

Texas Instruments, TIPD148 Level Translation: Dual to Single Supply Amp, ±15V to 5V, product page

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