Design Goals

Design Description

This design amplifies the input signal, V_i, with a signal gain of 10 V/V. The input signal may come from a high-impedance source (for example, MΩ) because the input impedance of this circuit is determined by the extremely high input impedance of the op amp (for example, GΩ). The common-mode voltage of a non-inverting amplifier is equal to the input signal.

Design Notes

1. Use the op amp linear output operating range, which is usually specified under the A_OL test conditions. The common-mode voltage is equal to the input signal.
2. The input impedance of this circuit is equal to the input impedance of the amplifier.
3. Using high-value resistors can degrade the phase margin of the circuit and introduce additional noise in the circuit.
4. Avoid placing capacitive loads directly on the output of the amplifier to minimize stability issues.
5. The small-signal bandwidth of a non-inverting amplifier depends on the gain of the circuit and the gain bandwidth product (GBP) of the amplifier. Additional filtering can be accomplished by adding a capacitor in parallel to R₁. Adding a capacitor in parallel with R₁ will also improve stability of the circuit if high-value resistors are used.
6. Large signal performance may be limited by slew rate. Therefore, check the maximum output swing versus frequency plot in the data sheet to minimize slew-induced distortion.
7. For more information on op amp linear operating region, stability, slew-induced distortion, capacitive load drive, driving ADCs, and bandwidth please see the Design References section.

Design Steps

The transfer function for this circuit is given below.

1. Calculate the gain.
   $$\begin{gathered} \mathrm{G}=\frac{{\mathrm{V}}_{\mathrm{o\_max}}-{\mathrm{V}}_{\mathrm{o\_min}}}{{\mathrm{V}}_{\mathrm{i\_max}}-{\mathrm{V}}_{\mathrm{i\_min}}} \\ \mathrm{G}=\frac{10\mathrm{V}-\left(-10\mathrm{V}\right)}{1 \mathrm{V}-\left(-1 \mathrm{V}\right)}=10\mathrm{V}/\mathrm{V} \end{gathered}$$
2. Calculate values for R₁ and R₂.
   $$\begin{gathered} \mathrm{G}=1+\frac{{\mathrm{R}}_1}{{\mathrm{R}}_2} \\ \mathrm{Choose} {\mathrm{R}}_1=9.09\mathrm{k\Omega } \\ {\mathrm{R}}_2=\frac{{\mathrm{R}}_1}{\mathrm{G}-1}=\frac{9.09\mathrm{k\Omega }}{\left(10\mathrm{V}/\mathrm{V}\right)-1}=1.01\mathrm{k\Omega } \end{gathered}$$
3. Calculate the minimum slew rate required to minimize slew-induced distortion.
   $\mathrm{SR}>2\times \mathrm{\pi }\times {\mathrm{V}}_{\mathrm{p}}\times \mathrm{f}=2\times \mathrm{\pi }\times 10\mathrm{V}\times 20\mathrm{kHz}=1.257\mathrm{V}/\mathrm{\mu s}$
   • The slew rate of the OPA171 is 1.5 V/µs, therefore it meets this requirement.
4. To maintain sufficient phase margin, ensure that the zero created by the gain setting resistors and input capacitance of the device is greater than the bandwidth of the circuit.

• C_cm and C_diff are the common-mode and differential input capacitances of the OPA171, respectively.
• Since the zero frequency is greater than the bandwidth of the circuit, this requirement is met.

Design Simulations

DC Simulation Results

AC Simulation Results

Design References

See Analog Engineer's Circuit Cookbooks for TI's comprehensive circuit library.

See circuit SPICE simulation file SBOC493.

For more information on many op amp topics including common-mode range, output swing, and bandwidth please visit TI Precision Labs.

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