Design Goals
Input | Output | Supply | Common-Mode Voltage | Error | Total Ionizing Dose | Single-Event Immunity | ||
---|---|---|---|---|---|---|---|---|
ILOAD,MIN | ILOAD,MAX | VOUT, min | VOUT, max | VS | VCM | Output Error | TID | SEL |
–7.5 A | 7.5 A | 500 mV | 3.5 V | 5 V | 24 V | < 2% | 50 krad (Si) | 75 MeV × cm2/mg |
Design Description
This circuit that utilizes a TL1431-SP, JANS2N2222A NPN transistor (see the following image), and passive components to achieve bidirectional sensing from a unidirectional current sense amplifier, the INA901-SP. In this particular setup, the normal operating load is from –7.5 A to 7.5 A, with a supply voltage of 5 V. This topology may be used any supply voltage independent of the desired offset. In addition to this functionality, this circuit implements the INA901-SP, which is a Radiation-Hardness-Assured (RHA), 50-krad (Si) capable device at Low Dose Rate, that is also Single Event Latch-up (SEL) Immune to 75 MeV-cm2/mg at 125°C. The solution presented in this circuit is a high-side implementation, with a common-mode voltage range of 2.5 V to 65 V.
Design Notes
Design Steps
From the desired –7.5-A design target, it is calculated that the maximum allowable shunt to achieve this goal is found using the following:
As the design ILOAD target in the remaining direction is symmetric about VREF, 10 mΩ was selected to complete the design. The final input VSENSE swing is calculated as:
The expected corresponding output is found using:
So for a successful design, a shunt of at least 1-W rated power is chosen for continuous sensing.
Add some margin for any potential voltage transients on the common mode. For the given design, the JANS2N2222A is chosen, as it is able to withstand a VCE of 50 V maximum, and meets the needs of the design. The expected power dissipated through the BJT is found with the following equation:
A one-point calibration is performed by applying the condition, to the system, capturing the actual value output by the INA901-SP, and maintaining the difference between this value and the calculated ideal in memory. The output of the device is then consistently shifted by this amount. An example of the effects of this are shown in the following simulated results.
Design Simulations
DC Sweep Results, –7.5 A < ILOAD < 7.5 A
Calibration of the raw data from simulation results in the VSENSE = 0 point shifting to an error of 0%, and a < 1% error over the full load range, thus meeting the design goal. Note that parameters such as device offset and input bias currents in TINA-TI models reflect typical data sheet parameters, and additional error may be exhibited pre- and post-calibration due to variation in these parameters. For more information, see the Bidirectional Topologies for the INA901-SP application note.
Design References
See the TI Precision Labs, Current Sense Amplifiers video series.
INA901-SP | |
---|---|
VS | 2.7 V to 16 V |
VCM | –15 V to 65 V |
VOUT | GND+3 mV to VS – 50 mV, typical |
VOS | ±500 μV, typical |
Iq | 350 μA, typical |
IB | ±8 μA, typical |
TID Characterization (ELDRS-Free) |
50 krad (Si) |
SEL Immune to LET |
75 MeV-cm2/mg |
INA901-SP |
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