TPS7A14 is a small, ultra low-dropout regulator with excellent transient response and can provide sourcing current up to 1-A peak. Normally, key design performance of LDO includes high PSRR, low noise, low ripple, fast transient response, low quiescent at no load condition, good line and load regulation. And also, the stability is always necessary for LDO. TPS7A14 specifies these requirements superior and can be useful for the application of low input and low dropout power rails. It features NMOS pass element and fixed Vout so for optimized package and schematic size. This application note addresses the flexibility to adjustable Vout configuration and followed concerns on loop stability.
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TPS7A14xx is available for a wide range of output voltages but in fixed steps of 25 mV, and it is changeable through OTP process. However, in some applications, applying multiple TPS7A14 for variable power rails, there is a need to have them unified for design flexibility as well as management matters. Starting from understanding of inside blocks, users can easily configure adjustable Vout rails
Figure 1-1 shows how internal circuitry is connected and its functional blocks. Generally, NMOSFET pass transistor has low impedance at output stage. Hence it can provide low noise performance since NMOS LDO has a low spike/ripple at output which is dependent on output impedance. Unit gain Opamp named as EA (error amplifier) monitors output voltage directly via SENSE pin and its reference_Vref at non-inverting input comes from the additional Op amp loop. It has a dedicated gain to make Vref follow desired Vout in 25-mV steps and it can be trimmed through OTP process adjusting RB of its resistor network. Bandgap 1.2 V is supplied from external biasing accommodating ultra low dropout at low output voltages. Section 1.2 will address the reason why NMOS LDO needs external biasing.