APPLICATION BRIEF
Debounce a Switch
Many physical switches can bounce for hundreds of microseconds after being pressed, while most logic devices respond in just a few nanoseconds. This can result in false triggers and erroneous output. By adding an appropriate debounce circuit between a button and a CMOS input, these bounces can be eliminated.
See more about this use case in the Logic Minute video Debounce a Switch.
Design Considerations
- Select a time constant based on the bouncing characteristics of your switch
- Select a resistor based on power
consumption, input voltage, or capacitor size limitations
- Power consumption is calculated with the pullup voltage and resistor value: P = V2 ÷ R
- Input voltage is determined by voltage drop across the resistor caused by leakage into the device input. This is calculated with Ohm's Law: V = I × R
- Capacitor values can be limited due to package size
Time Constants for Common Resistor and Capacitor Values
| Capacitor (μF) | Time Constant (ms)(1) | ||
|---|---|---|---|
| R = 10 kΩ | R = 100 kΩ | R = 1 MΩ | |
| 1 | 10 | 100 | 1000 |
| 0.1 | 1 | 10 | 100 |
| 0.01 | 0.1 | 1 | 10 |
(1) Time constant should be approximately half of the desired
debounce time. This is commonly selected as 10 ms to give maximum debounce time
while preventing humans from noticing the delay.
- [FAQ] How does a slow or floating input affect a CMOS device?
- Need additional assistance? Ask our engineers a question on the TI E2E™ logic support forum
Recommended Parts
| Part Number | Automotive Qualified | VCC Range | Type | Features |
|---|---|---|---|---|
| SN74LVC1G17-Q1 | ✓ | 1.65 V–5.5 V | Single Buffer | Schmitt-trigger inputs Over-voltage tolerant inputs to 5.5 V |
| SN74LVC1G17 | ||||
| SN74AUP1G17 | 0.8 V–3.6 V | Single Buffer | Schmitt-trigger inputs Over-voltage tolerant inputs to 3.6 V Ultra low power |
For more devices, browse through the online parametric tool where you can sort by desired voltage, channel numbers, and other features.
