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This document contains information for the ADS130B04-Q1 (TSSOP package) to aid in a functional safety system design. Information provided are:
Figure 1-1 shows the device functional block diagram for reference.
The ADS130B04-Q1 was developed using a quality-managed development process, but was not developed in accordance with the IEC 61508 or ISO 26262 standards.
This section provides functional safety failure in time (FIT) rates for the ADS130B04-Q1 based on two different industry-wide used reliability standards:
FIT IEC TR 62380 / ISO 26262 | FIT (Failures Per 109 Hours) |
---|---|
Total component FIT rate | 13 |
Die FIT rate | 2 |
Package FIT rate | 11 |
The failure rate and mission profile information in Table 2-1 comes from the reliability data handbook IEC TR 62380 / ISO 26262 part 11:
Table | Category | Reference FIT Rate | Reference Virtual TJ |
---|---|---|---|
5 | CMOS, BICMOS Digital, analog, or mixed |
60 FIT | 70°C |
The reference FIT rate and reference virtual TJ (junction temperature) in Table 2-2 come from the Siemens Norm SN 29500-2 tables 1 through 5. Failure rates under operating conditions are calculated from the reference failure rate and virtual junction temperature using conversion information in SN 29500-2 section 4.
The failure mode distribution estimation for the ADS130B04-Q1 in Table 3-1 comes from the combination of common failure modes listed in standards such as IEC 61508 and ISO 26262, the ratio of sub-circuit function size and complexity and from best engineering judgment.
The failure modes listed in this section reflect random failure events and do not include failures due to misuse or overstress.
Die Failure Modes | Failure Mode Distribution (%) |
---|---|
Incorrect conversion result of individual ADC(1). (For example, ADC output code at positive or negative full scale, at 0 V, undetermined, or otherwise incorrect.) |
35% |
SPI communication error | 10% |
Register bit error leading to incorrect device configuration. (Device behavior depends on which user or internal register bit is affected.) |
10% |
Gain error of individual ADC out of specification(1) | 10% |
Offset error of individual ADC out of specification(1) | 5% |
Noise of conversion result of individual ADC out of specification(1) | 5% |
INL of individual ADC out of specification(1) | 5% |
Gain error, INL, or noise of conversion results of all four ADCs out of specification because of common circuitry. (Common circuitry includes internal supplies, voltage reference, bias current generator, and clock.) |
5% |
Oscillator fault leading to incorrect data rate. (For example, oscillator frequency too high or low, oscillator output stuck-at) |
5% |
ADC output code bit stuck-at | 5% |
Device behavior undetermined | 5% |