MSP430F5xx Overview and Comparison to MSP430F2xx and MSP430F4xx

The MSP430F5xx series of devices is the latest addition to the MSP430™ family of microcontrollers. Although there are many common features between the MSP430F5xx and MSP430F2xx and MSP430F4xx offerings, there are also several differences. This document gives a brief overview of differences between the device families. Detailed information regarding specific differences can be found in the respective module chapters in the MSP430F5xx and MSP430F6xx Family User's Guide.

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MSP430 is a trademark of Texas Instruments.

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1 Introduction

This document is a snapshot of major functional differences between the MSP430F5xx family of devices and its predecessor device families, MSP430F2xx and MSP430F4xx.

In this document, the term core refers to the key subsystem modules that are common to all MSP430F5xx devices. These include the central processing unit (CPUX), the Power Management module (PMM), the Unified Clock System module (UCS), the System module (SYS), as well as memory mapping and allocation.

Most of the core changes to the MSP430F5xx were required primarily to support the growing demands of microcontroller applications, which include higher levels of integration, higher performance levels at lower power, increased flexibility, and extensions for future enhancements. Although these changes were necessary, the intent was to maintain as much look and feel, as well as compatibility, with earlier MSP430 generations.

This application report contains three major sections. The first section describes the memory mapping present on the MSP430F5xx. The second section describes the core modules and any key differences from existing MSP430F2xx and MSP430F4xx devices. The last section describes each of the peripheral modules that exists on the first MSP430F5xx offerings along with any key differences from similar modules found on MSP430F2xx and MSP430F4xx devices.

2 Memory Mapping

The MSP430F5xx family memory space has changed significantly from the MSP430F2xx and MSP430F4xx device families. Changes were required to support future peripheral expansion, increased memory options, and future extensions.

The peripheral space has been expanded up to 4KB to support current peripheral set and future additions. There is no longer byte-only peripheral space. In general, most peripheral registers can be accessed in byte or word formats, however, there are some exceptions.

RAM space now begins at 01C00h for all MSP430F5xx devices. There is a moving boundary between RAM and program space depending on the size of the RAM.

The interrupt vector space still resides up to the upper boundary of the 64-KB address space, however, the number of vectors has been increased to support up to 64 interrupt vectors. All interrupt vectors should be used with symbolic programming, because the order and number of vectors can change from device to device. See the device-specific data sheet for allocated vectors and their priorities.

The bootloader (BSL) memory allocation has been increased to 2KB to support various BSL options, including the capability for a user-generated BSL.

3 Core Modules

The core modules consist of the CPUX, PMM, UCS, SYS, JTAG, and EEM modules. The core remains consistent among all devices in the MSP430F5xx family.