RF430CL330H Dynamic NFC Interface Transponder

1 Device Overview

1.1 Features

NFC Tag Type 4
ISO14443B-Compliant 13.56-MHz RF Interface Supports up to 848 kbps
SPI or I²C Interface to Write and Read NDEF Messages to Internal SRAM
3KB of SRAM for NDEF Messages
Automatic Checking of NDEF Structure
Interrupt Register and Output Pin to Indicate NDEF Read or Write Completion

1.2 Applications

Bluetooth® Pairing
Wi-Fi® Configuration
Diagnostic Interface
Sensor Interface

1.3 Description

The Texas Instruments Dynamic NFC Interface Transponder RF430CL330H is an NFC Tag Type 4 device that combines a wireless NFC interface and a wired SPI or I²C interface to connect the device to a host. The NDEF message in the SRAM can be written and read from the integrated SPI or I²C serial communication interface and can also be accessed and updated wirelessly through the integrated ISO14443B-compliant RF interface that supports up to 848 kbps.

This operation allows NFC connection handover for an alternative carrier like Bluetooth, Bluetooth Low Energy (BLE), and Wi-Fi as an easy and intuitive pairing process or authentication process with only a tap. As a general NFC interface, the RF430CL330H enables end equipments to communicate with the fast-growing infrastructure of NFC-enabled smart phones, tablets, and notebooks.

Table 1-1 Device Information⁽¹⁾

PART NUMBER	PACKAGE	BODY SIZE⁽²⁾
RF430CL330HPW	TSSOP (14)	5 mm x 4.4 mm
RF430CL330HRGT	VQFN (16)	3 mm x 3 mm

(1) For the most current part, package, and ordering information for all available devices, see the Package Option Addendum in Section 7, or see the TI web site at www.ti.com.

(2) The sizes shown here are approximations. For the package dimensions with tolerances, see the Mechanical Data in Section 7.

1.4 Typical Application Diagram

Figure 1-1 shows a typical application diagram for the RF430CL330H device.

Figure 1-1 Typical Application

2 Revision History

Changes from B Revision (June 2014) to C Revision

Added RGT package to Device Information tableGo
Added RGT package pinoutGo
Added RGT package to Table 3-1Go
Added Section 4.8Go

3 Terminal Configuration and Functions

Figure 3-1 shows the pin assignments for the PW package.

Figure 3-1 14-Pin PW Package (Top View)

Figure 3-2 shows the pin assignments for the RGT package.

Figure 3-2 16-Pin RGT Package (Top View)

Table 3-1 Terminal Functions

TERMINAL			I/O	DESCRIPTION
NAME	NO.
NAME	PW	RGT
VCC	1	15	PWR	3.3-V power supply
ANT1	2	1	RF	Antenna input 1
ANT2	3	2	RF	Antenna input 2
RST	4	3	I	Reset input (active low)
E0 (TMS)	5	4	I	I²C address select 0 SPI mode select 0 (JTAG test mode select)
E1 (TDO)	6	5	I (O)	I²C address select 1 SPI mode select 1 (JTAG test data output)
E2 (TDI)	7	6	I	I²C address select 2 (JTAG test data in)
INTO (TCK)	8	7	O	Interrupt output (JTAG test clock)
SCMS/ CS	9	8	I	Serial Communication Mode Select (during device initialization) Chip select (in SPI mode)
SCK	10	9	I	SPI clock input (SPI mode)
SO/SCL	11	10	I/O	SPI slave out (SPI mode) I²C clock (I²C mode)
SI/SDA	12	11	I/O	SPI slave in (SPI mode) I²C data (I²C mode)
VCORE	13	12	PWR	Regulated core supply voltage
VSS	14	13	PWR	Ground supply
NC	-	14, 16		Leave open, No connection

For recommended capacitance values, see Recommended Operating Conditions.

Figure 3-3 Example Application Diagram (I²C Operation) (PW Package Shown)

For recommended capacitance values, see Recommended Operating Conditions.

Figure 3-4 Example Application Diagram (SPI Operation) (PW Package Shown)